The number of flip-flops required to construct a binary modulo N counter is __________.

Find the contents of the flip-flop Q₂, Q₁ and Q₀ in the circuit of figure, after giving four clock pulses to the clock terminal. Assume Q₂Q₁Q₀ = 000 initially.

A control algorithm is implemented by the NAND – gate circuitry given in figure below, which A and B are state variable implemented by D flip-flops, and P is control input. Develop the state transition table for this controller.