## ISRO-2016

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Question 1 |

Which of the following is true?

√3 + √7 = √10 | |

√3 + √7 ≤ √10 | |

√3 + √7 < √10 | |

√3 + √7 > √10 |

Question 1 Explanation:

√3 + √7=1.7320508075688772935274463415059 + 2.6457513110645905905016157536393

=4.3778021186334678840290620951451

√10=3.1622776601683793319988935444327

So, √3 + √7 > √10 is true.

=4.3778021186334678840290620951451

√10=3.1622776601683793319988935444327

So, √3 + √7 > √10 is true.

Question 2 |

A given connected graph is a Euler Graph if and only if all vertices of are of

same degree | |

even degree | |

odd degree | |

different degree |

Question 2 Explanation:

A given connected graph is a Euler Graph if and only if all vertices of are of even degree.

→ Let G(V, E) be an Euler graph. Thus G contains an Euler line Z, which is a closed walk.

→ Let this walk start and end at the vertex u ∈ V. Since each visit of Z to an intermediate vertex v of Z contributes two to the degree of v and since Z traverses each edge exactly once, d(v) is even for every such vertex.

→ Each intermediate visit to u contributes two to the degree of u, and also the initial and ﬁnal edges of Z contribute one each to the degree of u. So the degree d(u) of u is also even.

**Proof:**→ Let G(V, E) be an Euler graph. Thus G contains an Euler line Z, which is a closed walk.

→ Let this walk start and end at the vertex u ∈ V. Since each visit of Z to an intermediate vertex v of Z contributes two to the degree of v and since Z traverses each edge exactly once, d(v) is even for every such vertex.

→ Each intermediate visit to u contributes two to the degree of u, and also the initial and ﬁnal edges of Z contribute one each to the degree of u. So the degree d(u) of u is also even.

Question 3 |

The maximum number of edges in a n-node undirected graph without self loops is

n ^{2} | |

n(n-1)/2 | |

n-1 | |

n(n+1)/2 |

Question 3 Explanation:

The set of vertices has size n, the number of such subsets is given by the binomial coefficient C(n,2)⋅C(n,2)=n(n-1)/2.

Question 4 |

The minimum number of NAND gates required to implement the Boolean function A + AB’+ AB’C is equal to

0 | |

1 | |

4 | |

7 |

Question 4 Explanation:

A + AB’+ AB’C = A(1+B’+B’C) = A

No GATE is required to implement the function A.

No GATE is required to implement the function A.

Question 5 |

The minimum Boolean expression for the following circuit is:

AB + AC + BC | |

A + BC | |

A + B | |

A + B + C |

Question 5 Explanation:

If the switches are in parallel then use “+”, and if they are serial then use “ ”.

A(B+C) + AB + (A+B)C = AB + AC + AB + AC + BC

= (AB+AB) + (AC+AC) + BC

= AB + AC + BC

A(B+C) + AB + (A+B)C = AB + AC + AB + AC + BC

= (AB+AB) + (AC+AC) + BC

= AB + AC + BC

Question 6 |

For a binary half-subtractor having two inputs A and B, the correct set of logical expressions for the outputs D (= A minus B) and X (=borrow) are

D = AB + A’B , X = A’B | |

D = A’B + AB’ , X = AB’ | |

D = A’B + AB’ , X = A’B | |

D = AB + A’B , X = AB’ |

Question 6 Explanation:

The function table for the Half Subtractor is as follows

A-B= D= A’B + AB’

X= A’B

A-B= D= A’B + AB’

X= A’B

Question 7 |

Consider the following gate network
Which one of the following gates is redundant?

Gate No. 1 | |

Gate No. 2 | |

Gate No. 3 | |

Gate No. 4 |

Question 7 Explanation:

W’ + W’Z + Z’XY = W’(1+Z) + Z’XY

= W’ + Z’XY

The term W’Z is redundant which is represented by GATE 2.

= W’ + Z’XY

The term W’Z is redundant which is represented by GATE 2.

Question 8 |

The dynamic hazard problem occurs in

combinational circuit alone | |

sequential circuit only | |

Both (a) and (b) | |

None of the above |

Question 8 Explanation:

→ A dynamic hazard is the possibility of an output changing more than once as a result of a single input change.

→ Dynamic hazards often occur in larger logic circuits where there are different routes to the output (from the input).

→ If each route has a different delay, then it quickly becomes clear that there is the potential for changing output values that differ from the required / expected output. e.g.

→ A logic circuit is meant to change output state from 1 to 0, but instead changes from 1 to 0 then 1 and finally rests at the correct value 0. This is a dynamic hazard.

→ As a rule, dynamic hazards are more complex to resolve, but note that if all static hazards have been eliminated from a circuit, then dynamic hazards cannot occur.

→ Dynamic hazards often occur in larger logic circuits where there are different routes to the output (from the input).

→ If each route has a different delay, then it quickly becomes clear that there is the potential for changing output values that differ from the required / expected output. e.g.

→ A logic circuit is meant to change output state from 1 to 0, but instead changes from 1 to 0 then 1 and finally rests at the correct value 0. This is a dynamic hazard.

→ As a rule, dynamic hazards are more complex to resolve, but note that if all static hazards have been eliminated from a circuit, then dynamic hazards cannot occur.

Question 9 |

The logic circuit given below converts a binary code y1,y2,y3 into

Excess-3 code | |

Gray code | |

BCD code | |

Hamming Code |

Question 9 Explanation:

X1= Y1

X2= Y1⊕ Y2

X3= Y2 ⊕ Y3

X2= Y1⊕ Y2

X3= Y2 ⊕ Y3

Question 10 |

The circuit given below in the figure below is

An oscillating circuit and its output is a square wave | |

The one whose output remains stable in ‘1’ state | |

The one having output remains stable in ‘0’ state | |

has a single pulse of three times propagation delay |

Question 10 Explanation:

The square wave has alternating amplitudes(0 and 1) with duty cycle 1.

An odd number of cascaded NOT gates produce a square wave.

Note: Duty cycle= Ratio of durations in which the circuit is ON and OFF in a cycle.

An odd number of cascaded NOT gates produce a square wave.

Note: Duty cycle= Ratio of durations in which the circuit is ON and OFF in a cycle.

Question 11 |

If 12A7C

_{16}= X_{8}, then the value of X is224174 | |

425174 | |

6173 | |

225174 |

Question 11 Explanation:

Given, (12A7C)

MAke blocks of 3 bits each from LSB to MSB.

(Note: In the last block append zeros (as MSBs) if number bits is not three)

(000 010 010 101 001 111 100)

Each of the above blocks represents a digit in base 8 and they can be converted to base 8 as shown below.

= (0 2 2 5 1 7 4)

_{16}= (0001 0010 1010 0111 1100)_{2}MAke blocks of 3 bits each from LSB to MSB.

(Note: In the last block append zeros (as MSBs) if number bits is not three)

(000 010 010 101 001 111 100)

Each of the above blocks represents a digit in base 8 and they can be converted to base 8 as shown below.

= (0 2 2 5 1 7 4)

_{8}Question 12 |

The Excess-3 code is also called

Cyclic Redundancy Code | |

Weighted Code | |

Self-Complementing Code | |

Algebraic Code |

Question 12 Explanation:

Excess-3 code is also called Self-Complementing Code. Because 1’s complement of an excess-3 number is equivalent to 9’s complement of the corresponding decimal digit.

→ In excess-3 code, each of the 4-bit numbers represents decimal digit which is 3 less than the actual decimal digit. So the bits have no fixed weight.

Excess-3 code is neither CRC nor Algebraic Code which is used for error detection and/or correction.

→ In excess-3 code, each of the 4-bit numbers represents decimal digit which is 3 less than the actual decimal digit. So the bits have no fixed weight.

Excess-3 code is neither CRC nor Algebraic Code which is used for error detection and/or correction.

Question 13 |

The simplified SOP (Sum of Product) form the Boolean expression (P + Q’ + R’)(P + Q’ + R)(P + Q + R’)

(P’Q + R) | |

(P + Q’R’) | |

(P Q’ + R ) | |

(PQ + R) |

Question 13 Explanation:

Question 14 |

Which of the following binary number is the same as its 2’s complement?

1010 | |

0101 | |

1000 | |

1001 |

Question 14 Explanation:

Hint: Number of bits=4

(Decimal value of maximum 4-bit number +1 )/2= (15+1)/2=8

(Decimal value of maximum 4-bit number +1 )/2= (15+1)/2=8

Question 15 |

The functional difference between SR flip-flop and JK flip-flop is that

JK Flip-flop is faster than SR flip-flop | |

JK flip-flop has a feedback path | |

JK flip-flop accepts both inputs 1 | |

None of them |

Question 15 Explanation:

-> JK flip flop accepts input J=K=1. When J=K=1, the state of the flip-flop gets complimented. But it's not a valid input in SR flip-flop.

-> JK flip flop doesn’t have a feedback path.

-> JK flip flop doesn’t have a feedback path.

Question 16 |

Consider a non-pipelined processor with a clock rate of 2.5 gigahertz and average cycles per instruction of four. The same processor is upgraded to a pipelined processor with five stages; but due to the internal pipeline delay, the clock speed is reduced to 2 gigahertz. Assume that there are no stalls in the pipeline. The speedup achieved in this pipelined processor is

3.2 | |

3.0 | |

2.2 | |

2.0 |

Question 16 Explanation:

→ Given that the processor clock rate = 2.5 GHz, the processor takes 2.5 G cycles in one second.

→ Time taken to complete one cycle = (1 / 2.5 G) seconds

→ Since it is given that average number of cycles per instruction = 4, the time taken for completing one instruction=(4/2.5 G) = 1.6 ns

→ In the pipelined case we know in the ideal case CPI = 1, and the clock speed = 2 GHz.

→ Time taken for one instruction in the pipelined case = (1 / 2 G) = 0.5 ns

→ Speedup = 1.6/0.5 = 3.2

→ Time taken to complete one cycle = (1 / 2.5 G) seconds

→ Since it is given that average number of cycles per instruction = 4, the time taken for completing one instruction=(4/2.5 G) = 1.6 ns

→ In the pipelined case we know in the ideal case CPI = 1, and the clock speed = 2 GHz.

→ Time taken for one instruction in the pipelined case = (1 / 2 G) = 0.5 ns

→ Speedup = 1.6/0.5 = 3.2

Question 17 |

What is the output of this C code?

5 5 5 | |

5 5 junk | |

5 junk junk | |

Compile time error |

Question 17 Explanation:

If we are given p instead of *p then it prints the address of k but we are printing the value of k.

The same rule applies in **m.

Output is 5 5 5

The same rule applies in **m.

Output is 5 5 5

Question 18 |

Consider a disk pack with 16 surfaces, 128 tracks per surface and 256 sectors per track. 512 bytes of data are stored in a bit serial manner in a sector. The capacity of the disk pack and the number of bits required to specify a particular sector in the disk are respectively:

256 Mbyte, 19 bits | |

256 Mbyte, 21 bits | |

512 Mbyte, 20 bits | |

64 GB, 28 bits |

Question 18 Explanation:

→ Given that the disk pack has 16 surfaces, 128 tracks per surface, 256 sectors per track and each sector size is 512 bytes.

→ So the disk pack capacity = 16*128*256*512 bytes = 256 MB

→ To specify a sector we need the information about surface number, track number and sector number within a track.

→ Surface number needs 4 bits as there are 16 surfaces(2

→ Total number bits needed to specify a particular sector = 4+7+8 = 19 bits.

→ So the disk pack capacity = 16*128*256*512 bytes = 256 MB

→ To specify a sector we need the information about surface number, track number and sector number within a track.

→ Surface number needs 4 bits as there are 16 surfaces(2

^{4}), track number needs 7 bits as there are 128 tracks(2^{7}) within a surface, within a track the sector number needs 8 bits as there are 256 sectors (2^{8}).→ Total number bits needed to specify a particular sector = 4+7+8 = 19 bits.

Question 19 |

Let the page fault service time be 10 ms in a computer with average memory access time being 20 ns. If the one-page fault is generated for every 106 memory accesses, what is the effective access time for the memory?

21.4 ns | |

29.9 ns | |

23.5 ns | |

35.1 ns |

Question 19 Explanation:

Question 20 |

Register renaming is done in pipelined processors

as an alternative to register allocation at compile time | |

for efficient access to function parameters and local variables | |

to handle certain kinds of hazards | |

as part of address translation |

Question 20 Explanation:

→ Register renaming is used to eliminate hazards that arise due to WAR (Write After Read) and WAW(Write After Write) dependencies.

Question 21 |

In which class of Flynn’s taxonomy, Von Neumann architecture belongs to?

SISD | |

SIMD | |

MIMD | |

MISD |

Question 21 Explanation:

→ SISD (single instruction stream, single data stream) is a computer architecture in which a single uni-core processor, executes a single instruction stream, to operate on data stored in a single memory. This corresponds to the von Neumann architecture.

→ SISD is one of the four main classifications as defined in Flynn's taxonomy.

→ In this system, classifications are based upon the number of concurrent instructions and data streams present in the computer architecture. According to Michael J. Flynn, SISD can have concurrent processing characteristics.

→ Pipelined processors and superscalar processors are common examples found in most modern SISD computers.

→ Instructions are sent to the control unit from the Memory Module and are decoded and sent to the processing unit which processes on the data retrieved from Memory module and sent back to it.

→ SISD is one of the four main classifications as defined in Flynn's taxonomy.

→ In this system, classifications are based upon the number of concurrent instructions and data streams present in the computer architecture. According to Michael J. Flynn, SISD can have concurrent processing characteristics.

→ Pipelined processors and superscalar processors are common examples found in most modern SISD computers.

→ Instructions are sent to the control unit from the Memory Module and are decoded and sent to the processing unit which processes on the data retrieved from Memory module and sent back to it.

Question 22 |

What will be the output of the following program? Assume that you are running this program in little-endian processor.

1 | |

320 | |

64 | |

Compilation error |

Question 22 Explanation:

Ptr = (char*) &a ; /* It is type casted to char* */

Printf (“%d”, *ptr) ; /* Here *ptr is referring a single character */

Printf (“%d”, *ptr) ;

Output: 64 /* @ ASCII value is 64 */

Note: Assume short a is 2 byte integer.

Printf (“%d”, *ptr) ; /* Here *ptr is referring a single character */

Printf (“%d”, *ptr) ;

Output: 64 /* @ ASCII value is 64 */

Note: Assume short a is 2 byte integer.

Question 23 |

Consider the following segment of C-code:
The number of comparisons made in the execution of the loop for any n > 0 is:

⌊log _{2}n⌋*n | |

n | |

⌊log _{2}n⌋ | |

⌊log _{2}n⌋+1 |

Question 23 Explanation:

Explanation:

Let us consider n=6, then

1<=6 (correct)

2<=6 (correct)

4<=6 (correct)

8<=6 (False)

4 comparisons required

Option A:

⌊log n⌋+1

⌊log 6⌋+1

3+1=4 (correct)

Option B:

n=6 (False)

Option C:

⌊log n⌋

⌊log 6⌋=3 (False)

Option D:

⌊log

⌊log

Let us consider n=6, then

1<=6 (correct)

2<=6 (correct)

4<=6 (correct)

8<=6 (False)

4 comparisons required

Option A:

⌊log n⌋+1

⌊log 6⌋+1

3+1=4 (correct)

Option B:

n=6 (False)

Option C:

⌊log n⌋

⌊log 6⌋=3 (False)

Option D:

⌊log

_{2}n⌋+1⌊log

_{2}6⌋+1=2+1=3 (False)Question 24 |

The following postfix expression with single digit operands is evaluated using a stack:

8 2 3 ^ / 2 3 * + 5 1 * –

Note that ^ is the exponentiation operator. The top two elements of the stack after the first * is evaluated are

8 2 3 ^ / 2 3 * + 5 1 * –

Note that ^ is the exponentiation operator. The top two elements of the stack after the first * is evaluated are

6,1 | |

5,7 | |

3,2 | |

1,5 |

Question 24 Explanation:

Expression: 8 2 3 ^ / 2 3 * + 5 1 * –

Rule (1): If the element is a number, Push it into stack.

Rule (2): If the element is an operator, Pop operands from the stack. Evaluate the operator operation and Push the result back into the stack.

Rule (1): If the element is a number, Push it into stack.

Rule (2): If the element is an operator, Pop operands from the stack. Evaluate the operator operation and Push the result back into the stack.

Question 25 |

The average number of key comparisons required for a successful search for sequential search on items is

n/2 | |

(n-1)/2 | |

(n+1)/2 | |

None of these |

Question 25 Explanation:

Total comparisons required

= No. of comparisons if element present in 1

= 1+2+3+ ... + n

= n(n+1)/2

Since there are n elements in the list, so average no. of comparisons

= Total comparisons/Total no. of elements

= (n(n+1)/2)/n

= n+1/2

= No. of comparisons if element present in 1

^{st}position + No. of comparisons if element present in 2^{nd}nd position + ............. + No. of comparisons if element present in n^{th}position= 1+2+3+ ... + n

= n(n+1)/2

Since there are n elements in the list, so average no. of comparisons

= Total comparisons/Total no. of elements

= (n(n+1)/2)/n

= n+1/2

Question 26 |

A Hash Function f is defined as f(key) = key mod 7. With linear probing, while inserting the keys 37, 38, 72, 48, 98, 11, 56 into a table indexed from 0, in which location the key 11 will be stored (Count table index 0 as 0th location)?

3 | |

4 | |

5 | |

6 |

Question 26 Explanation:

Given data, insertion order is 37, 38, 72, 48, 98, 11, 56

Hash function = f(key) = key mod 7

Hash function = f(key) = key mod 7

Question 27 |

A complete binary tree with n non-leaf nodes contains

log _{2}n nodes | |

n+1 nodes | |

2n nodes | |

2n+1 nodes |

Question 27 Explanation:

→ A binary tree where each non-leaf node has exactly two children. The number of leaves is n+1. Total number of nodes is 2n+1.

Note: if two leaves having the same parent are removed from the tree, the number of leaves and non-leaves will decrease by 1 because the parent will be a leaf. That means the difference between them is constant. And for a tree having just one node that difference is 1.

Note: if two leaves having the same parent are removed from the tree, the number of leaves and non-leaves will decrease by 1 because the parent will be a leaf. That means the difference between them is constant. And for a tree having just one node that difference is 1.

Question 28 |

Algorithm design technique used in quicksort algorithm is?

Dynamic programming | |

Backtracking | |

Divide and conquer | |

Greedy method |

Question 28 Explanation:

Divide and conquer sorting algorithms:

1. Quick sort

2. Merge sort

3. Heap sort

****Binary search also follows the divide and conquer.

1. Quick sort

2. Merge sort

3. Heap sort

****Binary search also follows the divide and conquer.

Question 29 |

A FSM(finite state machine) can be considered to be a turing machine of finite tape length

without rewinding capability and unidirectional tape movement | |

rewinding capability and unidirectional tape movement | |

without rewinding capability and bidirectional tape movement | |

rewinding capability and bidirectional tape movement |

Question 29 Explanation:

→ A FSM(finite state machine) can be considered to be a turing machine of finite tape length without rewinding capability and unidirectional tape movement.

→ The finite state machine has less computational power than some other models of computation such as the Turing machine.

→ The computational power distinction means there are computational tasks that a Turing machine can do but a FSM cannot. This is because a FSM's memory is limited by the number of states it has.

→ A finite state machine has the same computational power as a Turing machine that is restricted such that its head may only perform "read" operations, and always has to move from left to right. That is, each formal language accepted by a finite state machine is accepted by such a kind of restricted Turing machine, and vice versa.

→ The finite state machine has less computational power than some other models of computation such as the Turing machine.

→ The computational power distinction means there are computational tasks that a Turing machine can do but a FSM cannot. This is because a FSM's memory is limited by the number of states it has.

→ A finite state machine has the same computational power as a Turing machine that is restricted such that its head may only perform "read" operations, and always has to move from left to right. That is, each formal language accepted by a finite state machine is accepted by such a kind of restricted Turing machine, and vice versa.

Question 30 |

Let L = {w = (0+1)* | w has even number of 1’s}, i.e. L is the set of all bit strings with even number of 1’s. Which one of the regular expression below represents L ?

(0*10*1)* | |

0*(10*10*)* | |

0*(10*1*)*0* | |

0*1(10*1)10* |

Question 30 Explanation:

→ The best way to find correct answer is option elimination method.

→ We will guess strings which has even number of 1’s and that is not generated by wrong options OR which generate strings which doesn’t have even number of 1’s.

Option A: (Regular expression: (0*10*1)* ) doesn’t generate string such as { 110, 1100,....}

Option C: (Regular expression: 0*(10*1*)*0* generate string such as {1, 111,....} which have odd number of 1’s.

Option D: (Regular expression: 0*1(10*1)*10* doesn’t generate strings such as { 11101, 1111101, ….}.

→ We will guess strings which has even number of 1’s and that is not generated by wrong options OR which generate strings which doesn’t have even number of 1’s.

Option A: (Regular expression: (0*10*1)* ) doesn’t generate string such as { 110, 1100,....}

Option C: (Regular expression: 0*(10*1*)*0* generate string such as {1, 111,....} which have odd number of 1’s.

Option D: (Regular expression: 0*1(10*1)*10* doesn’t generate strings such as { 11101, 1111101, ….}.

Question 31 |

Consider the following recurrence:

T(n) = 2T(√n) + 1

T(1) = 1

Which of the following is true?

T(n) = 2T(√n) + 1

T(1) = 1

Which of the following is true?

T(n)= O(log log n) | |

T(n) = O(log n) | |

T(n) = O(√n) | |

T(n)= O(n) |

Question 31 Explanation:

Question 32 |

Consider the following statements about the context-free grammar

G = {S→ SS, S→ ab, S→ ba, S→ ^}

I. G is ambiguous

II. G produces all strings with an equal number of a’s and b’s

III. G can be accepted by a deterministic PDA.

Which combination below expresses all the true statements about?

G = {S→ SS, S→ ab, S→ ba, S→ ^}

I. G is ambiguous

II. G produces all strings with an equal number of a’s and b’s

III. G can be accepted by a deterministic PDA.

Which combination below expresses all the true statements about?

I only | |

I and III only | |

II and III only | |

I, II and III |

Question 32 Explanation:

Is ambiguous, as it has two parse tree for the string “abbaba”

G doesn’t produce all strings of an equal number of a’s and b’s, for ex: string “aabb” doesn’t generate by grammar G.

The language generated by G can be accepted by DPDA. We can notice that grammar G generates, a’s and b’s in pair, i.e. either “ab” or “ba”, so the strings in language are {ab, ba, abab, abba, baba, ….}

We can design the DPDA:

G doesn’t produce all strings of an equal number of a’s and b’s, for ex: string “aabb” doesn’t generate by grammar G.

The language generated by G can be accepted by DPDA. We can notice that grammar G generates, a’s and b’s in pair, i.e. either “ab” or “ba”, so the strings in language are {ab, ba, abab, abba, baba, ….}

We can design the DPDA:

Question 33 |

If L and L’ are recursively enumerable then L is

Regular | |

Context-free | |

Context Sensitive | |

Recursive |

Question 33 Explanation:

→ If L is recursive enumerable, then it implies that there exist a Turing Machine (lets say M1) which always HALT for the strings which is in L.

→ If L’ are recursively enumerable, then it implies that there exist a Turing Machine (lets say M2) which always HALT for the strings which is NOT in L(as L is complement of L’ Since we can combine both Turing machines (M1 and M2) and obtain a new Turing Machine (say M3) which always HALT for the strings if it is in L and also if it is not in L.

→ This implies that L must be recursive.

→ If L’ are recursively enumerable, then it implies that there exist a Turing Machine (lets say M2) which always HALT for the strings which is NOT in L(as L is complement of L’ Since we can combine both Turing machines (M1 and M2) and obtain a new Turing Machine (say M3) which always HALT for the strings if it is in L and also if it is not in L.

→ This implies that L must be recursive.

Question 34 |

S → aSa ∣ bSb ∣ a ∣ b
The language generated by the above grammar over the alphabet is the set of

all palindromes | |

all odd length palindromes | |

strings that begin and end with the same symbol | |

all even length palindromes |

Question 34 Explanation:

From the grammar, we can easily infer that it generates all the palindromes of odd length,
for ex: strings {aba, bab, aaa, bbb, ….}

Question 35 |

What is the highest type number that can be assigned to the following grammar?

S → Aa

A → Ba

B → abc

S → Aa

A → Ba

B → abc

Type 0 | |

Type 1 | |

Type 2 | |

Type 3 |

Question 35 Explanation:

Grammar is belongs to Type 0 ,Type 1,Type 2,Type 3 because it is regular. Option D is right answer because they are asking only

**highest type number.**Question 36 |

The access time of the symbol table will be logarithmic if it is implemented by

Linear list | |

Search tree | |

Hash table | |

Self organization list |

Question 36 Explanation:

Access time of the symbolic table will be logarithmic if it is implemented by search time.

Question 37 |

Recursive descent parsing is an example of

Top-down parsers | |

Bottom-up parsers | |

Predictive parsers | |

None of the above |

Question 37 Explanation:

→ A recursive descent parser is a kind of top-down parser built from a set of mutually recursive procedures (or a non-recursive equivalent) where each such procedure implements one of the nonterminals of the grammar.

→ Thus the structure of the resulting program closely mirrors that of the grammar it recognizes.

→ Thus the structure of the resulting program closely mirrors that of the grammar it recognizes.

Question 38 |

A top-down parser generates

Rightmost Derivation | |

Rightmost derivation in reverse | |

Leftmost derivation | |

Leftmost derivation in reverse |

Question 38 Explanation:

→ Top-down parsing can be viewed as an attempt to find leftmost derivations of an input-stream by searching for parse-trees using a top-down expansion of the given formal grammar rules.

→ The inclusive choice is used to accommodate ambiguity by expanding all alternative right-hand-sides of grammar rules.

→ The inclusive choice is used to accommodate ambiguity by expanding all alternative right-hand-sides of grammar rules.

Question 39 |

Relative mode of addressing is most relevant to writing

Coroutines | |

Position-independent code | |

Shareable code | |

Interrupt Handlers |

Question 39 Explanation:

The main advantage of PC- relative addressing is that code may be position independent, i.e., it can be loaded anywhere in memory without the need to adjust any address.

Question 40 |

With single resource, deadlock occurs

If there are more than two processes competing for that resources | |

If there are only two processes competing for that resources | |

If there is a single process competing for that resources | |

None of these |

Question 40 Explanation:

Only Single resource available never occur deadlock because it violates circular wait and hold & wait condition.

Question 41 |

Peephole optimization is a form of

Loop optimization | |

Local optimization | |

Constant folding | |

Data flow analysis |

Question 41 Explanation:

→ Peephole optimization technique works locally on the source code to transform it into an optimized code.

→ By locally, we mean a small portion of the code block at hand.

→ These methods can be applied on intermediate codes as well as on target codes.

→ By locally, we mean a small portion of the code block at hand.

→ These methods can be applied on intermediate codes as well as on target codes.

Question 42 |

At a particular time of computation the value of a counting semaphore is 7. Then 20 P operations and xV operations were completed on this semaphore. If the new value of semaphore is 5 ,x will be

18 | |

22 | |

15 | |

13 |

Question 42 Explanation:

Here, 20P operations means 20 wait operations. It decrement value by 1 every time.

xV operations means x increments operations. It increment value by 1 every time.

→ New value of semaphore is 5 after performing xV operations

= -13 + xV

= 5

xV = 5 + 13

= 18

→ After applying 20P operations in semaphore value is = 7-20 = -13

xV operations means x increments operations. It increment value by 1 every time.

→ New value of semaphore is 5 after performing xV operations

= -13 + xV

= 5

xV = 5 + 13

= 18

→ After applying 20P operations in semaphore value is = 7-20 = -13

Question 43 |

A system has 3 processes sharing 4 resources. If each process needs a maximum of 2 units, then

Deadlock can never occur | |

Deadlock may occur | |

Deadlock has to occur | |

None of these |

Question 43 Explanation:

If the system is deadlocked, it implies that each process is holding one resource and is waiting for one more. Since there are 3 processes and 4 resources, one process must be able to obtain two resources. This process requires no more resources and therefore it will return its resources when done.

Question 44 |

Determine the number of page faults when references to pages occur in the following order:
1, 2, 4, 5, 2, 1, 2, 4
Assume that the main memory can accommodate 3 pages and the main memory already has the pages 1 and 2, with page one having brought earlier than page 2. (LRU page replacement algorithm is used)

3 | |

5 | |

4 | |

None of these |

Question 44 Explanation:

Here, total 6 page faults but in question, they are clearly mentioned that the main memory already has the pages 1 and 2, with page one having brought earlier than page 2. It means 6-2=4.

Question 45 |

Working Set(t,k) at an instant of time t is

the set of future references that the OS will make | |

the set of future references that the OS will make in the next unit of time | |

the set of references with high frequency | |

the set of pages that have been referenced in the last time units |

Question 45 Explanation:

→ Working set defines the amount of memory that a process requires in a given time interval.

→ It defines “the working set of information W(t,τ) of a process at time t to be the collection of information referenced by the process during the process time interval (t−τ,t)”.

→ Typically the units of information in question are considered to be memory pages. This is suggested to be an approximation of the set of pages that the process will access in the future (say during the next τ time units), and more specifically is suggested to be an indication of what pages ought to be kept in main memory to allow most progress to be made in the execution of that process.

→ It defines “the working set of information W(t,τ) of a process at time t to be the collection of information referenced by the process during the process time interval (t−τ,t)”.

→ Typically the units of information in question are considered to be memory pages. This is suggested to be an approximation of the set of pages that the process will access in the future (say during the next τ time units), and more specifically is suggested to be an indication of what pages ought to be kept in main memory to allow most progress to be made in the execution of that process.

Question 46 |

A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation lookaside buffer (TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of the TLB tag is:

11 bits | |

13 bits | |

15 bits | |

20 bits |

Question 46 Explanation:

Page size = 4 KB = 4 × 210 Bytes = 212 Bytes

Virtual Address = 32 bit

No. of bits needed to address the page frame = 32 - 12 = 20

TLB can hold 128 page table entries with 4-way set associative

⇒ 128/4=32=25

→ 5 bits are needed to address a set.

→ The size of TLB tag = 20 - 5 = 15 bits

Virtual Address = 32 bit

No. of bits needed to address the page frame = 32 - 12 = 20

TLB can hold 128 page table entries with 4-way set associative

⇒ 128/4=32=25

→ 5 bits are needed to address a set.

→ The size of TLB tag = 20 - 5 = 15 bits

Question 47 |

For the real time operating system, which of the following is the most suitable scheduling scheme?

Round robin | |

Preemptive | |

First come first serve | |

Random scheduling |

Question 47 Explanation:

→ Preemption is the act of temporarily interrupting a task being carried out by a computer system, without requiring its cooperation, and with the intention of resuming the task at a later time. Such changes of the executed task are known as context switches.

→ It is normally carried out by a privileged task or part of the system known as a preemptive scheduler, which has the power to preempt, or interrupt, and later resume, other tasks in the system.

→ Preemptive scheduling is the most suitable scheduling scheme for real time operating systems as it can always preempt other processes based on priority.

→ In real time operating systems, we have different tasks to perform simultaneously and also there are a few tasks which need to be performed first at priority basis.

→ It is normally carried out by a privileged task or part of the system known as a preemptive scheduler, which has the power to preempt, or interrupt, and later resume, other tasks in the system.

→ Preemptive scheduling is the most suitable scheduling scheme for real time operating systems as it can always preempt other processes based on priority.

→ In real time operating systems, we have different tasks to perform simultaneously and also there are a few tasks which need to be performed first at priority basis.

Question 48 |

In which one of the page replacement policies, Belady’s anomaly may occur?

FIFO | |

Optimal | |

LRU | |

MRU |

Question 48 Explanation:

→ Belady's anomaly is the phenomenon in which increasing the number of page frames results in an increase in the number of page faults for certain memory access patterns.

→ This phenomenon is commonly experienced when using the first-in first-out (FIFO) page replacement algorithm.

→ In FIFO, the page fault may or may not increase as the page frames increase, but in Optimal and stack-based algorithms like LRU, as the page frames increase the page fault decreases.

→ This phenomenon is commonly experienced when using the first-in first-out (FIFO) page replacement algorithm.

→ In FIFO, the page fault may or may not increase as the page frames increase, but in Optimal and stack-based algorithms like LRU, as the page frames increase the page fault decreases.

Question 49 |

Consider the join of a relation R , with a relation S . If R has m number of tuples and S has n number of tuples then the maximum and minimum sizes of the join respectively are:

m + n & 0 | |

mn & 0 | |

m + n & | m – n | | |

mn & m + n |

Question 49 Explanation:

**For maximum:**

If there is common attribute in R and S, and every row of R match with every row of S then total no. of tuples will be mn.

**For minimum:**

If there is no common attribute between R and S or if there is common attribute but none of the row of R matches with rows of S then output tuples will be 0.

Question 50 |

Let R(a, b, c) and S(d, e, f) be two relations in which d is the foreign key of S that refers to the primary key of R. Consider the following four operations R and S.
I. Insert into R
II. Insert into S
III. Delete from R
IV. Delete from S
Which of the following can cause a violation of the referential integrity constraint above?

Both I and IV | |

Both II and III | |

All of these | |

None of these |

Question 50 Explanation:

Question 51 |

The relation book (

select title

from book as B

where (select count(*)

from book as T

where T.price>B.price)<5

__title__&__price__) contains the titles and prices of different books. Assuming that no two books have the same price, what does the following SQL query list?select title

from book as B

where (select count(*)

from book as T

where T.price>B.price)<5

Titles of the four most expensive books | |

Title of the fifth most inexpensive book | |

Title of the fifth most expensive book | |

Titles of the five most expensive books |

Question 51 Explanation:

→ Which results titles of the five most expensive books.

→ The where clause of outer query will be true for 5 most expensive books.

→ The where clause of outer query will be true for 5 most expensive books.

Question 52 |

Goals for the design of the logical scheme include

avoiding data inconsistency | |

being able to construct query easily | |

being able to access data efficiently | |

All of the above |

Question 52 Explanation:

Logical Schema includes

1. Avoiding data inconsistency

2. Able to construct query easily

3. Able to access data efficiently

1. Avoiding data inconsistency

2. Able to construct query easily

3. Able to access data efficiently

Question 53 |

Given the relations
employee (name, salary, dept-no), and
department (dept-no, dept-name,address)
Which of the following queries cannot be expressed using the basic
relational algebra operations (σ, π, x, -, ∪, p)

Department address of every employee | |

Employees whose name is the same as their department name | |

The sum of all employees’ salaries | |

All employees of a given department |

Question 53 Explanation:

The sum of all employee salaries can’t be represented by using the given six basic algebra operation. If we want to represent sum of salaries then we need to use aggregation operator.

Question 54 |

Trigger is

Statement that enables to start any DBMS | |

Statement that is executed by the user when debugging an application program | |

The condition that the system tests for the validity of the database user | |

Statement that is executed automatically by the system as a side effect of a modification of the database |

Question 54 Explanation:

→ A database trigger is procedural code that is automatically executed in response to certain events on a particular table or view in a database.

→ The trigger is mostly used for maintaining the integrity of the information on the database.

→ For example, when a new record (representing a new worker) is added to the employees table, new records should also be created in the tables of the taxes, vacations and salaries.

→Triggers can also be used to log historical data, for example to keep track of employees' previous salaries.

→ The trigger is mostly used for maintaining the integrity of the information on the database.

→ For example, when a new record (representing a new worker) is added to the employees table, new records should also be created in the tables of the taxes, vacations and salaries.

→Triggers can also be used to log historical data, for example to keep track of employees' previous salaries.

Question 55 |

The order of a leaf node in a B+ tree is the maximum number of (value, data record pointer) pairs it can hold. Given that the block size is 1K bytes, data record pointer is 7 bytes long, the value field is 9 bytes long and a block pointer is 6 bytes long, what is the order of the leaf node?

63 | |

64 | |

67 | |

68 |

Question 55 Explanation:

Disk Block size = 1 KBytes = 2

Data recorder pointer size, r = 7 bytes

Value size, v = 9 bytes

Disk Block pointer, P = 6 bytes

⇒ Order of leaf be m, then

r*m+v*m+p <= 1024

7m+9m+6 <= 1024

16m <= 1024 - 6

m <= 63

^{10}Bytes = 1024 BytesData recorder pointer size, r = 7 bytes

Value size, v = 9 bytes

Disk Block pointer, P = 6 bytes

⇒ Order of leaf be m, then

r*m+v*m+p <= 1024

7m+9m+6 <= 1024

16m <= 1024 - 6

m <= 63

Question 56 |

A clustering index is defined on the fields which are of type

non-key and ordering | |

non-key and non-ordering | |

key and ordering | |

key and non-ordering |

Question 56 Explanation:

**Single level index**

1. Primary index(Sparse): Ordered with key field

2. Clustered index(Sparse): Ordered with non key field

3. Secondary index(dense): Ordered with either key or non key field.

Question 57 |

The extent to which the software can continue to operate correctly despite the introduction of invalid inputs is called as

Reliability | |

Robustness | |

Fault tolerance | |

Portability |

Question 57 Explanation:

→ The extent to which the s/w can continue to operate correctly despite the introduction of invalid inputs is called as robustness

→ Robustness is the ability of a computer system to cope with errors during execution and cope with erroneous input

→ Robustness is the ability of a computer system to cope with errors during execution and cope with erroneous input

Question 58 |

Which one of the following is a functional requirement

Maintainability | |

Portability | |

Robustness | |

None of the mentioned |

Question 58 Explanation:

Functional Requirements include:

1. Descriptions of data to be entered into the system

2. Descriptions of operations performed by each screen

3. Descriptions of work-flows performed by the system

4. Descriptions of system reports or other outputs

→ The Functional Requirements Specification is designed to be read by a general audience. Readers should understand the system, but no particular technical knowledge should be required to understand the document.

Examples:

1. Interface requirements

2. Business requirements

3. Regulatory/Compliance requirements

4. Security requirements

1. Descriptions of data to be entered into the system

2. Descriptions of operations performed by each screen

3. Descriptions of work-flows performed by the system

4. Descriptions of system reports or other outputs

→ The Functional Requirements Specification is designed to be read by a general audience. Readers should understand the system, but no particular technical knowledge should be required to understand the document.

Examples:

1. Interface requirements

2. Business requirements

3. Regulatory/Compliance requirements

4. Security requirements

Question 59 |

Configuration management is not concerned with

controlling changes to the source code | |

choice of a hardware configuration for an application | |

controlling documentation changes | |

maintaining versions of software |

Question 59 Explanation:

Configuration management is not concerned with choice of hardware configuration for an application.

Question 60 |

A company needs to develop a strategy for software product development for which it has a choice of two programming languages L1 and L2. The number of lines of code (LOC) developed using L2 is estimated to be twice the LOC developed with Ll. The product will have to be maintained for five years. Various parameters for the company are given in the table below.

Total cost of the project includes cost of development and maintenance.

What is the LOC for L1 for which the cost of the project using L1 is equal to the cost of the project using L2?

Total cost of the project includes cost of development and maintenance.

What is the LOC for L1 for which the cost of the project using L1 is equal to the cost of the project using L2?

10,000 | |

5,000 | |

7,500 | |

75,000 |

Question 60 Explanation:

LOC L1 = X

L2 = 2X

Total cost of project: x/1000*1000000+5+100000

=2x/10000*750000+50000*5

=100×+500000

=150×+250000

⟹50×=500000-250000

L2 = 2X

Total cost of project: x/1000*1000000+5+100000

=2x/10000*750000+50000*5

=100×+500000

=150×+250000

⟹50×=500000-250000

Question 61 |

A company needs to develop digital signal processing software for one of its newest inventions. The software is expected to have 20000 lines of code. The company needs to determine the effort in person-months needed to develop this software using the basic COCOMO model. The multiplicative factor for this model is given as 2.2 for the software development on embedded systems, while the exponentiation factor is given as 1.50. What is the estimated effort in person-months?

196.77 | |

206.56 | |

199.56 | |

210.68 |

Question 61 Explanation:

Constructive Cost Model (COCOMO) formula for effort applied is

Effort Applied (E) = a

= 2.2 x(20)

= 2.2 x 89.44

= 196.77

Effort Applied (E) = a

_{b}(KLOC)^{b}_{b}[ person-months ]= 2.2 x(20)

_{1.50}= 2.2 x 89.44

= 196.77

Question 62 |

In the Spiral model of software development, the primary determinant in selecting activities in each iteration is

Iteration size | |

Cost | |

Adopted process such as Rational Unified Process or Extreme Programming | |

Risk |

Question 62 Explanation:

→ In the Spiral model of software development, the primary determinant in selecting activities in each iteration is risk handling

→ The spiral model is a risk-driven software development process model. Based on the unique risk patterns of a given project, the spiral model guides a team to adopt elements of one or more process models, such as incremental, waterfall, or evolutionary prototyping.

→ The spiral model is a risk-driven software development process model. Based on the unique risk patterns of a given project, the spiral model guides a team to adopt elements of one or more process models, such as incremental, waterfall, or evolutionary prototyping.

Question 63 |

Bit stuffing refers to

inserting a ‘0’ in user stream to differentiate it with a flag | |

inserting a ‘0’ in flag stream to avoid ambiguity | |

appending a nibble to the flag sequence | |

appending a nibble to the use data stream |

Question 63 Explanation:

→ Bit stuffing is most easily described as insertion of a 0 bit after a long run of 1 bits.

→ In SDLC the transmitted bit sequence "01111110" containing six adjacent 1 bits is the Flag byte.

→ Bit stuffing ensures that this pattern can never occur in normal data, so it can be used as a marker for the beginning and end of frame without any possibility of being confused with normal data.

→ In SDLC the transmitted bit sequence "01111110" containing six adjacent 1 bits is the Flag byte.

→ Bit stuffing ensures that this pattern can never occur in normal data, so it can be used as a marker for the beginning and end of frame without any possibility of being confused with normal data.

Question 64 |

Dynamic routing protocol enable routers to

Dynamically discover and maintain routes | |

Distribute routing updates to other routers | |

Reach agreement with other routers about the network topology | |

All of the above |

Question 64 Explanation:

Dynamic Routing

→ The administrator configure a routing protocol on your network interfaces.

→ Routing protocol learns about other routers automatically.

→ Router and the other routers exchange routes, and each learns about the networks that the other is connected to.

→ When new networks are added or removed, the routers update each other.

→ The administrator configure a routing protocol on your network interfaces.

→ Routing protocol learns about other routers automatically.

→ Router and the other routers exchange routes, and each learns about the networks that the other is connected to.

→ When new networks are added or removed, the routers update each other.

Question 65 |

In Ethernet CSMA/CD, the special bit sequence transmitted by media access management to handle collision is called

Preamble | |

Postamble | |

Jam | |

None of the above |

Question 65 Explanation:

→ In CSMA/CD once a collision is detected, the colliding devices send a jam signal.

→ Assuming you know the collision detection method used by CSMA/CD, the jam signals generated after collision informs the devices that a collision has occurred and invokes a random backoff algorithm which forces the devices on the Ethernet not to send any data until their timer expires. (everyone has a random timer value)

→ Once a transmitting device detects collision which is by examining the data over the Ethernet and identifying that it's not the data it has send, it does receive the jamming signal otherwise collision will keep happening.

→ As the jam signal is generated after collision hence the devices ideally won’t be sending any data during that time.

→ Assuming you know the collision detection method used by CSMA/CD, the jam signals generated after collision informs the devices that a collision has occurred and invokes a random backoff algorithm which forces the devices on the Ethernet not to send any data until their timer expires. (everyone has a random timer value)

→ Once a transmitting device detects collision which is by examining the data over the Ethernet and identifying that it's not the data it has send, it does receive the jamming signal otherwise collision will keep happening.

→ As the jam signal is generated after collision hence the devices ideally won’t be sending any data during that time.

Question 66 |

Which network protocol allows hosts to dynamically get a unique IP number on each bootup

DHCP | |

BOOTP | |

RARP | |

ARP |

Question 66 Explanation:

→ A router(or) a residential gateway can be enabled to act as a DHCP server.

→ Most residential network routers receive a globally unique IP address within the ISP network.

→ Within a local network, a DHCP server assigns a local IP address to each device connected to the network.

→ Most residential network routers receive a globally unique IP address within the ISP network.

→ Within a local network, a DHCP server assigns a local IP address to each device connected to the network.

Question 67 |

In a token ring network the transmission speed is 107 bps and the propagation speed is 200 meters/ μs. The 1-bit delay in this network is equivalent to:

500 meters of cable | |

200 meters of cable | |

20 meters of cable | |

50 meters of cable |

Question 67 Explanation:

T

Given T

In, 1 microsec it covers 200m

Therefore, in 0.1 microsec it is 200 * 0.1 = 20 meters

_{t}= L / B => 1/ 10^{7}= 0.1 microsecGiven T

_{p}= 200 m / microsecIn, 1 microsec it covers 200m

Therefore, in 0.1 microsec it is 200 * 0.1 = 20 meters

Question 68 |

The address of a class B host is to be split into subnets with a 6-bit subnet number. What is the maximum number of subnets and the maximum number of hosts in each subnet?

62 subnets and 262142 hosts | |

64 subnets and 262142 hosts | |

62 subnets and 1022 hosts | |

64 subnets and 1024 hosts |

Question 68 Explanation:

→ It is a class B address, so there 16-bits for NID and 16-bits for HID.

→ From HID, we took 6-bits for subnetting.

→ Then total subnets possible = ( 2

→ Total hosts possible for each subnet = (2

→ From HID, we took 6-bits for subnetting.

→ Then total subnets possible = ( 2

^{6}) - 2 = 62→ Total hosts possible for each subnet = (2

^{10}) - 2 = 1022Question 69 |

The message 11001001 is to be transmitted using the CRC polynomial x

^{3}+ 1 to protect it from errors. The message that should be transmitted is:11001001000 | |

11001001011 | |

11001010 | |

110010010011 |

Question 69 Explanation:

CRC polynomial = x3+1 [∵ In data 3-zero’s need to be append to data]

= 1001

∴ Data transmitted is: 11001001011

= 1001

∴ Data transmitted is: 11001001011

Question 70 |

What is the maximum size of data that the application layer can pass on to the TCP layer below?

Any size | |

2 ^{16} bytes – size of TCP header | |

2 ^{16} | |

1500 |

Question 70 Explanation:

Application Layer - Any size

Transport Layer - 65515 byte

Network layer - 65535 byte

Data link layer - 1500 byte

Transport Layer - 65515 byte

Network layer - 65535 byte

Data link layer - 1500 byte

Question 71 |

Frames of 1000 bits are sent over a 10

^{6}bps duplex link between two hosts. The propagation time is 25ms. Frames are to be transmitted into this link to maximally pack them in transit (within the link). What is the minimum number of bits (I) that will be required to represent the sequence numbers distinctly? Assume that no time gap needs to be given between the transmission of two frames.l = 2 | |

l = 3 | |

l = 4 | |

l = 5 |

Question 71 Explanation:

→ Transmission time (Tt)=1000/10

→ Maximum number of frames that can be transmit to maximally pack them is

=(T

= (25+1)/1

=26 which is window size

→ Minimum sequence numbers required = 26

→ Minimum number of bits required for sequence number is 5.

^{6}seconds = 1 ms→ Maximum number of frames that can be transmit to maximally pack them is

=(T

_{t}+2T_{p})/T_{x}= (25+1)/1

=26 which is window size

→ Minimum sequence numbers required = 26

→ Minimum number of bits required for sequence number is 5.

Question 72 |

Which of the following is TRUE only for XML but NOT HTML?

It is derived from SGML | |

It describes content and layout | |

It allows user defined tags | |

It is restricted only to be used with web browsers |

Question 72 Explanation:

→ User-defined tags are only allowed in XML but not in HTML. All the other options are correct for both XML and HTML.

→ SGML stands for Standard Generalized Markup Language and it was extended to HTML and XML.

→ Both XML and HTML are used to describe the content and layout of a webpage and are used with web browsers only.

→ SGML stands for Standard Generalized Markup Language and it was extended to HTML and XML.

→ Both XML and HTML are used to describe the content and layout of a webpage and are used with web browsers only.

Question 73 |

Consider a system with 2 level cache. Access times of Level 1 cache, Level 2 cache and main memory are 1 ns, 10 ns, and 500 ns, respectively. The hit rates of Level 1 and Level 2 caches are 0.8 and 0.9, respectively. What is the average access time of the system ignoring the search time within the cache?

13.0 | |

12.8 | |

12.6 | |

12.4 |

Question 73 Explanation:

Average access time = [H

H

H

T

T

H

T

Average access time = [(0.8 * 1) + (0.2 * 0.9 * 10) + (0.2)(0.1) * 1 * 500]

= 0.8 + 1.8 + 10

= 12.6ns

_{1}* T_{1}] + [(1 - H_{1}) * H_{m}* T_{m}]H

_{1}= 0.8, (1 - H_{1}) = 0.2H

_{2}= 0.9, (1 - H_{2}) = 0.1T

_{1}= Access time for level 1 cache = 1nsT

_{2}= Access time for level 2 cache = 10nsH

_{m}= Hit rate of main memory = 1T

_{m}= Access time for main memory = 500nsAverage access time = [(0.8 * 1) + (0.2 * 0.9 * 10) + (0.2)(0.1) * 1 * 500]

= 0.8 + 1.8 + 10

= 12.6ns

Question 74 |

If a class C is derived from class B, which is derived from class A, all through public inheritance, then a class C member function can access

only protected and public data of C and B | |

Only protected and public data of C | |

all data of C and private data of A and B | |

public and protected data of A and B and all data of C |

Question 74 Explanation:

→ It is nothing but multilevel inheritance.

→ If a class C is derived from class B, which is derived from class A, all through public inheritance, then a class C member function can access public and protected data of A and B and all data of C

→ If a class C is derived from class B, which is derived from class A, all through public inheritance, then a class C member function can access public and protected data of A and B and all data of C

Question 75 |

Which one of the following is correct about the statements are given below?
I. All function calls are resolved at compile time in C language
II. All function calls are resolved at compile time in C++ language

Only II is correct | |

Both I and II are correct | |

Only I is correct | |

Both I and II are incorrect |

Question 75 Explanation:

Both statements are wrong.
I. Logical errors can’t solve in compile time. Like dividing by error.

II. In c++ also we have to write exceptions.

II. In c++ also we have to write exceptions.

Question 76 |

When a DNS server accepts and uses incorrect information from a host that has no authority giving that information, then it is called

DNS lookup | |

DNS hijacking | |

DNS spoofing | |

None of the mentioned |

Question 76 Explanation:

→ DNS spoofing, also referred to as DNS cache poisoning, is a form of computer security hacking in which corrupt Domain Name System data is introduced into the DNS resolves cache, causing the name server to return an incorrect result record, e.g. an IP address.

→ This results in traffic being diverted to the attacker's computer (or any other computer).

→ This results in traffic being diverted to the attacker's computer (or any other computer).

Question 77 |

A simple two-pass assembler does which of the following in the first pass:

Checks to see if the instructions are legal in the current assembly mode | |

It allocates space for the literals. | |

It builds the symbol table for the symbols and their values. | |

All of these |

Question 77 Explanation:

2-pass Assembler can perform all of above operations.

There are 77 questions to complete.