Pipelining

Question 13

If we use internal data forwarding to speed up the performance of a CPU (R1, R2 and R3 are registers and M[100] is a memory reference), then the sequence of operations

R1 → M[100]
M[100] → R2
M[100] → R3

can be replaced by

A	R1 → R3 R2 → M[100]
B	M[100] → R2 R1 → R2 R1 → R3
C	R1 → M[100] R2 → R3
D	R1 → R2 R1 → R3 R1 → M[100]

Computer-OrganizationPipeliningGATE 2004-IT

Question 13 Explanation:

Data forwarding means if CPU writes to a memory location and subsequently reads from the same memory location, the second instruction can fetch the value directly from the register used to do write than waiting for the memory. So, this increases the performance.

Correct Answer: D

Question 13 Explanation:

Data forwarding means if CPU writes to a memory location and subsequently reads from the same memory location, the second instruction can fetch the value directly from the register used to do write than waiting for the memory. So, this increases the performance.

Computer-Organization

Cache

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Cache

Pipelining

Computer-Organization

Cache

Computer-Organization

Cache

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