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Question 1436 – ISRO-2017 December
March 28, 2024
Question 13908 – Artificial-Intelligence
March 28, 2024
Question 1436 – ISRO-2017 December
March 28, 2024
Question 13908 – Artificial-Intelligence
March 28, 2024

Question 8784 – Computer-Organization

A RAM chip has a capacity of 1024 words of 8 bits each (1K×8). The number of 2×4 decoders with enable line needed to construct a 16K×16 RAM from 1K×8 RAM is

Correct Answer: B

Question 18 Explanation: 
The capacity of the RAM needed = 16K
Capacity of the chips available = 1K

No. of address lines = 16K/1K = 16

Hence we can use 4 × 16 decoder for this. But we were only given 2 × 4 decoders.

So 4 decoders are required in inner level as from one 2×4 decoder we have only 4 output lines whereas we need 16 output lines.

Now to point to these 4 decoders, another 2×4 decoder is required in the outer level.

Hence no. of 2×4 decoders to realize the above implementation of RAM = 1 + 4 = 5

A
4
B
5
C
6
D
7
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