Question 9946 – Computer-Organization

Design a 2K x 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)₁₆ to (17FF)₁₆ for the 8085 processor using four 1K x 4 memory chips. Each of these chips has the following signal pins:

(i) (Chip select, data lines are in high impedance state when it is 1)
(ii) (0 for read operation)
(iii) (0 for write operation)
(iv) A₀, A₁, …A₉(input address lines. A₀ is the lest significant)
(v) D₀, D₁, D₂, D₃(bi-directional data lines. D₀ is the least significant)

Correct Answer: A