Addressing-Modes

Question 1

Relative mode of addressing is most relevant to writing

A
coroutines
B
position – independent code
C
shareable code
D
interrupt handlers
Question 1 Explanation: 
The main advantage of PC- relative addressing is that code may be position independent, i.e., it can be loaded anywhere in memory without the need to adjust any address.
Question 2

Which of the following addressing modes permits relocation without any change whatsoever in the code?

A
Indirect addressing
B
Indexed addressing
C
Base register addressing
D
PC relative addressing
Question 2 Explanation: 
In PC relative addressing there is no change in the code.
Question 3

A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this processor?

A
Pointers
B
Arrays
C
Records
D
Recursive procedures with local variable
E
All the above
Question 3 Explanation: 
A) Cannot be implemented because pointers need indirect addressing mode.
B) Cannot be implemented because arrays need Register indexing.
C) Records also needs pointers which needs indirect addressing modes, so this also cannot be implemented.
D) Recursive procedures needs stack, and so it needs stack pointers which in turn needs indirect addressing. So this also cannot be implemented.
Question 4

In the absolute addressing mode

A
the operand is inside the instruction
B
the address of the operand is inside the instruction
C
the register containing the address of the operand is specified inside the instruction
D
the location of the operand is implicit
Question 4 Explanation: 
The operand is inside the instruction---Immediate addressing.
The operand is inside the instruction --- absolute addressing.
The register containing the address of the operand is specified inside the instruction --- Register addressing.
The location of the operand is implicit --- Implicit addressing.
Question 5

The instruction format of a CPU is:

Mode and RegR together specify the operand. RegR specifies a CPU register and Mode specifies an addressing mode. In particular, Mode = 2 specifies that ‘the register RegR contains the address of the operand, after fetching the operand, the contents of RegR are incremented by 1’.

An instruction at memory location 2000 specifies Mode = 2 and the RegR refers to program counter (PC).
(a) What is the address of the operand?
(b) Assuming that this is a non-jump instruction, what are the contents of PC after the execution of this instruction?

A
Theory Explanation.
Question 6

Which of the following statements about relative addressing mode is FALSE?

A
It enables reduced instruction size
B
It allows indexing of array elements with same instruction
C
It enables easy relocation of data
D
It enables faster address calculations than absolute addressing
Question 6 Explanation: 
As relative address are calculated from the absolute address. So relative addressing cannot be faster than absolute addressing.
Question 7

The most relevant addressing mode to write position-independent codes is:

A
Direct mode
B
Indirect mode
C
Relative mode
D
Indexed mode
Question 7 Explanation: 
Relative mode since we can just change the content of base register, if we wish to relocate.
Question 8

Which of the following addressing modes are suitable for program relocation at run time?

(i)  Absolute addressing     (ii) Based addressing
(iii) Relative addressing     (iv) Indirect addressing 
A
(i) and (iv)
B
(i) and (ii)
C
(ii) and (iii)
D
(i), (ii) and (iv)
Question 8 Explanation: 
Absolute Addressing:
A fixed address in memory which indicates a location by specifying a distance from another location. In this displacement type addressing is preferred.
So, option A is false.
Based Addressing:
This scheme is used by computers to control access to memory. In this pointers are replaced by protected objects which can be executed by kernel (or) some other privileged process authors.
So, this is suitable for program relocation at runtime.
Relative Addressing:
The offset of the relative addressing is to allow reference to code both before and after the instruction.
This is also suitable.
Indirect Addressing:
Which leads to extra memory location which can be not suitable at run time.
This is not suitable.
→ Only Based Addressing and Relative Addressing are suitable.
Question 9

Consider the C struct defined below:

    struct data   {
        int marks [100];
        char grade;
        int cnumber;
    };
    struct data student;

The base address of student is available in register R1. The field student.grade can be accessed efficiently using

A
Post-increment addressing mode, (R1)+
B
Pre-decrement addressing mode, -(R1)
C
Register direct addressing mode, R1
D
Index addressing mode, X(R1), where X is an offset represented in 2’s complement 16-bit representation
Question 9 Explanation: 
sruct data
{
int marks[100];
char grade;
int cnumber;
}; struct data student
Base Address of student is available in R1.
So student.grade can be accessed efficiently by Relative Indexed Addressing Mode.
It is clearly mentioned X is the offset address to be summed with Base Address of R1.

Hence Index Addressing mode X(R1), where X is an offset represented in 2’s complement 16-bit representation.
⇾ Relative, Base Indexed & all subtypes of Indirect addressing modes are used with Arrays.
Question 10

Which of the following is/are true of the auto-increment addressing mode?

    I. It is useful in creating self-relocating code
    II. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation
    III. The amount of increment depends on the size of the data item accessed
A
I only
B
II only
C
III Only
D
II and III only
Question 10 Explanation: 
I. Self relocating code always takes some address in memory. So auto-increment mode is not used for self relocating code. Hence this statement is wrong.
II. An additional ALU is not necessary for auto-increment. So this statement is wrong.
III. In auto-increment addressing mode the address where next data block to be stored is generated automatically depending upon the size of single data item required to store. This is based on pointer arithmetic. So this statement is true.
Hence option C is the answer.
Question 11

An instruction is stored at location 500 with it address field at location 501. The address field has the value 400. A processor register R1 contains the number 200. Match the addressing mode (List-I) given below with effective address (List-II) for the given instruction:



Choose the correct option from those given below:
A
(a)-(iii), (b)-(i), (c)-(iv), (d)-(ii)
B
(a)-(i), (b)-(ii), (c)-(iii), (d)-(iv)
C
(a)-(iv), (b)-(ii), (c)-(iii), (d)-(i)
D
(a)-(iv), (b)-(iii), (c)-(ii), (d)-(i)
Question 11 Explanation: 

Direct Address = 400
Relative Address = Next Instruction memory location + Direct Address value
= 502 + 400
= 902
Register indirect Address= 200
Indexed Address = Register Indirect Address + Direct Address
= 200 + 400
= 600
Question 12
A computer uses a memory unit of 512 K words of 32 bits each. A binary instruction code is stored in one word of the memory. The instruction has four parts: an addressing mode field to specify one of the two-addressing mode (direct and indirect), an operation code, a register code part to specify one of the 256 registers and an address part. How many bits are there in addressing mode part, opcode part, register code part and the address part?
A
1, 3, 9, 19
B
1, 4, 9, 18
C
1, 4, 8, 19
D
1, 8, 8, 20
Question 12 Explanation: 
Given data,
Memory unit= 512K words
512K words of 32 bits each.
Binary instruction code stored in 1 word of memory.
Instruction divided into 4 parts.
1. Operation code= ?
2. Register code= ?
3. Addressing mode (Direct and indirect)
4. Address port= ?
Addressing Mode part = 1 (Direct and indirect)
Operation Code = 32 - 1 - 18 - 8 bits = 5 bits
Register Code = 256 = 28 = 8 bits
Address port = 28 (256kB) * 210 (1024 bytes/kB) = 218 ⇒ 18 bits
final Answer is (1,5,8,18)
Note: None of the options given correct answer. We are given answer according to key given by NTA.
There are 12 questions to complete.

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