Combinational-Circuits

Question 1

In the following truth table, V = 1 if and only if the input is valid.

What function does the truth table represent?

A
Priority encoder
B
Decoder
C
Multiplexer
D
Demultiplexer
       Digital-Logic-Design       Combinational-Circuits       GATE 2013
Question 1 Explanation: 
It is a 22 × 2 encoder. The inputs have priorities. So, it is a priority encoder.
Question 2

The amount of ROM needed to implement a 4 bit multiplier is

A
64 bits
B
128 bits
C
1 Kbits
D
2 Kbits
       Digital-Logic-Design       Combinational-Circuits       GATE 2012
Question 2 Explanation: 
To implement a 4-bit multiplier we need to store all the possible combinations of 24 x 24 inputs and their corresponding 8 output bits. The total ROM size needed = 28 x 8 bits = 211 bits = 2 Kbits.
Hence option D is the answer.
Question 3

A circuit outputs a digit in the form of 4 bits. 0 is represented by 0000, 1 by 0001, ..., 9 by 1001. A combinational circuit is to be designed which takes these 4 bits as input and outputs 1 if the digit ≥ 5, and 0 otherwise. If only AND, OR and NOT gates may be used, what is the minimum number of gates required?

A
2
B
3
C
4
D
5
       Digital-Logic-Design       Combinational-Circuits       GATE 2004
Question 3 Explanation: 

= A + BD + BC
= A + B (D + C)
So minimum two OR gates and 1 AND gate is required. Hence, in total minimum 3 gates is required.
Question 4
The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent?
A
NOT
B
OR
C
AND
D
XOR
       Digital-Logic-Design       Combinational-Circuits       Nielit Scientist-B CS 22-07-2017
Question 4 Explanation: 
[(a.b)'. (a.b)' ]'= ((a.b)')' + ((a.b)')'
=(a.b)+(a.b)
=(a.b)
Question 5
In comparison with static RAM memory, the dynamic RAM memory has
A
Lower bit density and higher power consumption
B
Higher bit density and lower power consumption
C
Lower bit density and lower power consumption
D
None of the option
       Digital-Logic-Design       Combinational-Circuits       Nielit Scientist-B CS 22-07-2017
Question 5 Explanation: 
Dynamic memory uses capacitor for storing information, so it doesn't need constant power but it has higher bit density due to its configuration.
Question 6
Which of the following circuit can be used as parallel to serial converter?
A
Multiplexer
B
Demultiplexer
C
Decoder
D
Digital Counter
       Digital-Logic-Design       Combinational-Circuits       NieLit STA 2016 March 2016
Question 6 Explanation: 
In multiplexer, different inputs are inserted parallely and then it gives one output which is in serial form.
Question 7
Which one of the following is the function of a multiplexer
A
To decode information
B
To select 1 out of N input data sources and to transmit it to single channel
C
To transmit data on N lines
D
To perform serial to parallel conversion
       Digital-Logic-Design       Combinational-Circuits       Nielit Scientist-B IT 22-07-2017
Question 7 Explanation: 
● A multiplexer (or mux) is a device that combines several analog or digital input signals and forwards them into a single output line.
● A multiplexer of 2​ n inputs has n select lines, which are used to select which input line to send to the output.
● Multiplexers are mainly used to increase the amount of data that can be sent over the network within a certain amount of time and bandwidth.
Question 8
How many 2-input multiplexers are required to construct a 2​ 10​ input multiplexer?
A
1023
B
31
C
10
D
127
       Digital-Logic-Design       Combinational-Circuits       Nielit Scientific Assistance IT 15-10-2017
Question 8 Explanation: 
210 x1 MUX has 210 inputs.
Level-1 has 29 (=512) 2x1 multiplexers which take 2*29 = 210 inputs and produces 512 outputs.
Similarly,
Level-2 has 256 MUX.
Level-3 has 128 MUX.
Level-4 has 64 MUX.
Level-5 has 32 MUX.
Level-6 has 16 MUX.
Level-7 has 8 MUX.
Level-8 has 4 MUX.
Level-9 has 2 MUX.
Level-10 has 1 MUX.
Total number of Multiplexers=
512+256+128+64+32+16+8+4+2+1=1023
Question 9
A/an _____, also called a dta selector, is a combinational circuit with more than on input line, one output line and more than one selection line.
A
De multiplexer
B
Multiplexer or MUX
C
Operational amplifier
D
Integrated circuit
       Digital-Logic-Design       Combinational-Circuits       KVS DEC-2013
Question 9 Explanation: 
● A multiplexer (or mux) is a device that combines several analog or digital input signals and forwards them into a single output line.
● A multiplexer of 2​ n​ inputs has n select lines, which are used to select which input line to send to the output.
● A multiplexer is also called a data selector. Multiplexers can also be used to implement Boolean functions of multiple variables.
Question 10
Determine the function performed by the combinational circuit of the given figure.
A
4 to 1 multiplexer
B
8 to 1 multiplexer
C
16 to 1 multiplexer
D
32 to 1 multiplexer
       Digital-Logic-Design       Combinational-Circuits       KVS DEC-2013
Question 10 Explanation: 
Four input lines I​ 0​ ,I​ 1​ ,I​ 2​ and I​ 3​ and Two Selection lines S​ 0 and S​ 1
One output line F
Question 11
Determine the size of PROM required for implementing the 16 to 1 multiplexer
A
1Mx1
B
2Mx1
C
8Mx1
D
32mx1
       Digital-Logic-Design       Combinational-Circuits       KVS DEC-2013
Question 11 Explanation: 
●Programmable read-only memory (PROM) is read-only memory ( ​ ROM​ ) that can be modified once by a user.
● PROM is a way of allowing a user to tailor a microcode program using a special machine called a PROM programmer.
● PROM consists of n input and m output lines and which can be represented as 2​ n ​ x m PROM
● In order to implement an n-input , m-output circuit we need 2​ n​ x m size PROM
● From the given question we need to implement 16:1 Mux. So inputs are 16 + (4 selection lines in 16x1 mux) =20
● n=20 and m=1
● PROM size =2​ 20​ =1M
Question 12
A combinational logic circuit that is used when it is desired to send data from two more source through a single transmission line is known as__
A
Demultiplexer
B
Encoder
C
Decoder
D
Multiplexer
       Digital-Logic-Design       Combinational-Circuits       KVS DEC-2017
Question 12 Explanation: 
→ In electronics, a multiplexer (or mux) is a device that combines several analog or digital input signals and forwards them into a single output line.
→ A multiplexer of 2​ n​ inputs has n select lines, which are used to select which input line to send to the output. Multiplexers are mainly used to increase the amount of data that can be sent over the network within a certain amount of time and bandwidth.
→ A multiplexer is also called a data selector. Multiplexers can also be used to implement Boolean functions of multiple variables.
Question 13
Which of the following statement/s is/are correct?
  1. With on-chip decoding, 8 address lines can access 64 memory locations
  2. With on-chip decoding, 4 address lines can access 64 memory locations
  3. With on-chip decoding, 8 address lines can access 256 memory locations
  4. With on-chip decoding, 4 address lines can access 128 memory locations
A
Only a
B
A and b
C
Only c
D
C and d
       Digital-Logic-Design       Combinational-Circuits       KVS 30-12-2018 Part B
Question 13 Explanation: 
->The n address lines consists of 2n memory locations
->8 address lines can access 28 =256 memory locations
Question 14
Words having 8 bits are to be stored in computer memory. The number of lines required for writing into the memory are
A
1
B
2
C
4
D
8
       Digital-Logic-Design       Combinational-Circuits       KVS 30-12-2018 Part B
Question 14 Explanation: 
Each line carries one bit of information.
Question 15
Words having 8 bits are to be stored in computer memory. The number of lines required for writing into the memory are
A
1
B
2
C
4
D
8
       Digital-Logic-Design       Combinational-Circuits       KVS 30-12-2018 Part B
Question 15 Explanation: 
Each line carries one bit of information.
Question 16
The output of the following combinational circuit is F.
A
P1+P’2P3
B
P1+P’2P’3
C
P​ 1​ +P​ 2​ P’​ 3
D
P​’ 1​ +P​ 2​ P​ 3
       Digital-Logic-Design       Combinational-Circuits       UGC NET CS 2017 Nov- paper-2
Question 16 Explanation: 
Method1: Simplification by expansion.
F= (P1+P'2+P'3 )( P1+ P'2+ P3 )( P1+P2+P'3) ← POS
=(P1+ P1P'2 +P1P3 + P'2P1 + P'2 P'2 + P'2P3 + P'3P1+ P'3P'2+P'3P3 )(P1+P2+P'3)
=(P1(1+P'2+P3 + P'2 + P'3)+P'2 (1+P3+P'3) + 0)(P1+P2+P'3 =(P1+P'2)(P1+P2+P'3)
=P1(1+P2+P'3+P'2)+P'2P2+P'2P'3
=P1 + 0 + P'2P'3
=P1 + P'2P'3
Method2:
This can also be solved by using K-Map. F= (P1+P'2+P'3 )( P1+ P'2+ P3 )( P1+P2+P'3)
F= π(3,2,1)
Express above function as sum of minterms and simplify.
F =Σ(0,4,5,6,7)=P1 + P'2P'3
Question 17
Which of the following logic operations is performed by the following given combinational circuit?
A
EXCLUSIVE-OR
B
EXCLUSIVE-NOR
C
NAND
D
NOR
       Digital-Logic-Design       Combinational-Circuits       UGC NET CS 2016 Aug- paper-2
Question 17 Explanation: 

Question 18
What does the following logic diagram represent ?
A
Synchronous Counter
B
Ripple Counter
C
Combinational Circuit
D
Mod 2 Counter
       Digital-Logic-Design       Combinational-Circuits       UGC NET CS 2018 JUNE Paper-2
Question 18 Explanation: 
→ A ripple counter is an asynchronous counter where only the first flip-flop is clocked by an external clock.
→ All subsequent flip-flops are clocked by the output of the preceding flip-flop. Asynchronous counters are also called ripple-counters because of the way the clock pulse ripples it way through the flip-flops.
→ The MOD of the ripple counter or asynchronous counter is 2​ n​ if n flip-flops are used.
There are 18 questions to complete.
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