Microprogrammed-Control-Unit
Question 1 |
Consider a CPU where all the instructions require 7 clock cycles to complete execution. There are 140 instructions in the instruction set. It is found that 125 control signals are needed to be generated by the control unit. While designing the horizontal microprogrammed control unit, single address field format is used for branch control logic. What is the minimum size of the control word and control address register?
125, 7 | |
125, 10 | |
135, 7 | |
135, 10 |
Question 1 Explanation:
Each instruction takes 7 cycles,
i.e., 140 instruction takes = 140 * 7 =980 cycles.
So, size of control address register = ⌈log2 980⌉
= 10 bit
Since horizontal microprogramming is used, so 125 control signals will require 125 bits.
Hence, size of control word = 125 + 10 = 135 bits
i.e., 140 instruction takes = 140 * 7 =980 cycles.
So, size of control address register = ⌈log2 980⌉
= 10 bit
Since horizontal microprogramming is used, so 125 control signals will require 125 bits.
Hence, size of control word = 125 + 10 = 135 bits
Question 2 |
A microprogrammed control unit
Is faster than a hard-wired control unit. | |
Facilitates easy implementation of new instruction. | |
Is useful when very small programs are to be run. | |
Usually refers to the control unit of a microprocessor. |
Question 2 Explanation:
In micro-programmed control unit we can add new instruction by changing the content of control memory.
Question 3 |
The CPU of a system having 1 MIPS execution rate needs 4 machine cycles on an average for executing an instruction. The fifty percent of the cycles use memory bus. A memory read/ write employs one machine cycle. For execution of the programs, the system utilizes 90 percent of the CPU time. For block data transfer, an IO device is attached to the system while CPU executes the
background programs continuously. What is the maximum IO data transfer rate if programmed IO data transfer technique is used?
500 Kbytes/sec | |
2.2 Mbytes/sec | |
125 Kbytes/sec | |
250 Kbytes/sec |
Question 3 Explanation:
Given, CPU speed 10 6 instruction/sec
1 CPU instruction = 4 machine cycles
CPU utilization = 90%
Programmed IO: each byte transfer requires 4 cycles (instructions), in status, check status branch, R/W data in memory maximum data transfer rate,
1 CPU instruction = 4 machine cycles
CPU utilization = 90%
Programmed IO: each byte transfer requires 4 cycles (instructions), in status, check status branch, R/W data in memory maximum data transfer rate,
There are 3 questions to complete.