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TIFR PHD CS & SS 2013
October 5, 2023
UGC NET CS 2017 Nov- paper-3
October 5, 2023
TIFR PHD CS & SS 2013
October 5, 2023
UGC NET CS 2017 Nov- paper-3
October 5, 2023

Computer-Organization

Question 352
Which memory is difficult to interface with processor?
A
Static memory
B
Dynamic memory
C
ROM
D
None of the option
Question 352 Explanation: 
Dynamic random-access memory (DRAM) is a type of random access semiconductor memory that stores each bit of data in a separate tiny capacitor within an integrated circuit.
The electric charge on the capacitors slowly leaks off, so without intervention the data on the chip would soon be lost.
To prevent this, DRAM requires an external memory refresh circuit which periodically rewrites the data in the capacitors, restoring them to their original charge.
This refresh process is the defining characteristic of dynamic random-access memory, in contrast to static random-access memory (SRAM) which does not require data to be refreshed.
Correct Answer: B
Question 352 Explanation: 
Dynamic random-access memory (DRAM) is a type of random access semiconductor memory that stores each bit of data in a separate tiny capacitor within an integrated circuit.
The electric charge on the capacitors slowly leaks off, so without intervention the data on the chip would soon be lost.
To prevent this, DRAM requires an external memory refresh circuit which periodically rewrites the data in the capacitors, restoring them to their original charge.
This refresh process is the defining characteristic of dynamic random-access memory, in contrast to static random-access memory (SRAM) which does not require data to be refreshed.
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