UGC NET CS 2018 DEC Paper-1
October 10, 2023UGC NET Dec-2020 and June-2021 Paper-1
October 10, 2023Operating-Systems
Question 959 |
A computer has a single cache (off-chip) with a 3 ns hit time and a 95% hit rate. Main memory has a 50 ns access time. If we add an on-chip cache with a 0.6 ns hit time and a 98% hit rate, the computer’s effective access time:
2.8 ns | |
5.5 ns | |
0.7 ns | |
None of the options |
Question 959 Explanation:
Single off-chip hit time = 3 ns
Hit rate = 95% = 0.95
Miss rate = 0.05
Main Memory= 50 ns
Access time = 3 ns + 0.05 * 50 ns
= 2.5 ns
Add on-chip cache hit time= 0.6 ns
Hit rate = 98% = 0.98
Miss rate = 0.02
Effective access time = 0.6 ns + 0.02 * ( 3 ns + 0.05 * 50 ns)
= 0.71
Hit rate = 95% = 0.95
Miss rate = 0.05
Main Memory= 50 ns
Access time = 3 ns + 0.05 * 50 ns
= 2.5 ns
Add on-chip cache hit time= 0.6 ns
Hit rate = 98% = 0.98
Miss rate = 0.02
Effective access time = 0.6 ns + 0.02 * ( 3 ns + 0.05 * 50 ns)
= 0.71
Correct Answer: C
Question 959 Explanation:
Single off-chip hit time = 3 ns
Hit rate = 95% = 0.95
Miss rate = 0.05
Main Memory= 50 ns
Access time = 3 ns + 0.05 * 50 ns
= 2.5 ns
Add on-chip cache hit time= 0.6 ns
Hit rate = 98% = 0.98
Miss rate = 0.02
Effective access time = 0.6 ns + 0.02 * ( 3 ns + 0.05 * 50 ns)
= 0.71
Hit rate = 95% = 0.95
Miss rate = 0.05
Main Memory= 50 ns
Access time = 3 ns + 0.05 * 50 ns
= 2.5 ns
Add on-chip cache hit time= 0.6 ns
Hit rate = 98% = 0.98
Miss rate = 0.02
Effective access time = 0.6 ns + 0.02 * ( 3 ns + 0.05 * 50 ns)
= 0.71
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