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Programming
November 7, 2023
Operating-Systems
November 7, 2023
Programming
November 7, 2023
Operating-Systems
November 7, 2023

Question 9946 – Computer-Organization

Design a 2K x 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)16 to (17FF)16 for the 8085 processor using four 1K x 4 memory chips. Each of these chips has the following signal pins:

    (i) (Chip select, data lines are in high impedance state when it is 1)
    (ii) (0 for read operation)
    (iii) (0 for write operation)
    (iv) A0, A1, …A9(input address lines. A0 is the lest significant)
    (v) D0, D1, D2, D3(bi-directional data lines. D0 is the least significant)

Correct Answer: A

A
Theory Explanation.
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