Question 8170 – Machine-Instructions
December 4, 2023Question 1166 – Machine-Instructions
December 4, 2023Question 8958 – Machine-Instructions
Consider a hypothetical processor with an instruction of type LW R1, 20 (R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of constant 20 and the contents of register R2. Which of the following best reflects the addressing mode implemented by this instruction for the operand memory?
Correct Answer: D
Question 26 Explanation:
Here 20 will act as base and content of R2 will be index.
Immediate Addressing
Register Addressing
Register Indirect Scaled Addressing
Base Indexed Addressing
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