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Question 9842 – Digital-Logic-Design
February 13, 2024
Question 9845 – Digital-Logic-Design
February 13, 2024
Question 9842 – Digital-Logic-Design
February 13, 2024
Question 9845 – Digital-Logic-Design
February 13, 2024

Question 9843 – Digital-Logic-Design

The following arrangement of master-slave flip flops

has the initial state of P, Q as 0, 1 (respectively). After three clock cycles the output state P, Q is (respectively),

Correct Answer: A

Question 47 Explanation: 
Here clocks are applied to both flip flops simultaneously.
When 11 is applied to Jk flip flop it toggles the value of P so op at P will be 1.
Input to D flip flop will be 0(initial value of P) so op at Q will be 0.
A
1, 0
B
1, 1
C
0, 0
D
0, 1
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