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Question 3382 – Higher-Education-and-Politics
March 29, 2024
Question 3224 – Higher-Education-and-Politics
March 29, 2024
Question 3382 – Higher-Education-and-Politics
March 29, 2024
Question 3224 – Higher-Education-and-Politics
March 29, 2024

Question 9551 – Machine-Instructions

Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3.

 Instruction 	     Operation 	      Instruction Size(in words)
 MOV R1,5000; 	 ;R1 ← Memory[5000] 	         2
 MOV R2(R1); 	 ;R2 ← Memory[(R1)] 	         1
 ADD R2,R3; 	 ;R2 ← R2 + R3 	                 1
 MOV 6000,R2; 	 ;Memory[6000] ← R2 	         2
 HALT 	         ;Machine halts 	         1 

Consider that the memory is byte addressable with size 32 bits, and the program has been loaded starting from memory location 1000 (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be

Correct Answer: D

Question 8 Explanation: 
Byte addressable with size = 32 bits (word size) = 4 bytes
→ Interrupt occurs after executing halt instruction
So, number of instructions = 2+1+1+2+1 = 7
→ Each instruction with 4 bytes, then total instruction size = 7 * 4 = 28
→ Memory start location = 1000
→ Instruction saved location = 1000 + 28 = 1028
1028 is the starting address of next instruction.
A
1007
B
1020
C
1024
D
1028
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