GATE-2024-CS1(Forenoon)
February 14, 2025GATE-2024-CS1(Forenoon)
February 15, 2025GATE-2024-CS1(Forenoon)
| Question 30 |
Consider a 5-stage pipelined processor with Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB) stages. Which of the following statements about forwarding is/are CORRECT?
| In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction | |
| In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction | |
| Forwarding cannot prevent all pipeline stalls | |
| Forwarding does not require any extra hardware to retrieve the data from the pipeline stages |
Correct Answer: C
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