A computer uses 46-bit virtual address, 32-bit physical address, and a three-level paged page table organization. The page table base register stores the base address of the first-level table (T₁), which occupies exactly one page. Each entry of T₁ stores the base address of a page of the second-level table (T₂). Each entry of T₂ stores the base address of a page of the third-level table (T₃). Each entry of T₃ stores a page table entry (PTE). The PTE is 32 bits in size. The processor used in the computer has a 1 MB 16-way set associative virtually indexed physically tagged cache. The cache block size is 64 bytes.

What is the minimum number of page colours needed to guarantee that no two synonyms map to different sets in the processor cache of this computer?

A process executes the code

fork();
fork();
fork();

The total number of child processes created is

Consider the 3 processes, P1, P2 and P3 shown in the table.

Process           Arrival time         Time Units Required
   P1                0                         5
   P2                1                         7
   P3                3                         4

The completion order of the 3 processes under the policies FCFS and RR2 (round robin scheduling with CPU quantum of 2 time units) are

Fetch_And_Add(X,i) is an atomic Read-Modify-Write instruction that reads the value of memory location X, increments it by the value i, and returns the old value of X. It is used in the pseudocode shown below to implement a busy-wait lock. L is an unsigned integer shared variable initialized to 0. The value of 0 corresponds to lock being available, while any non-zero value corresponds to the lock being not available.

  AcquireLock(L){
         while (Fetch_And_Add(L,1))
               L = 1;
   }
  ReleaseLock(L){
         L = 0;
   }

This implementation

A file system with 300 GByte disk uses a file descriptor with 8 direct block addresses, 1 indirect block address and 1 doubly indirect block address. The size of each disk block is 128 Bytes and the size of each disk block address is 8 Bytes. The maximum possible file size in this file system is

Consider the virtual page reference string

1, 2, 3, 2, 4, 1, 3, 2, 4, 1  

On a demand paged virtual memory system running on a computer system that main memory size of 3 pages frames which are initially empty. Let LRU, FIFO and OPTIMAL denote the number of page faults under the corresponding page replacements policy. Then

Let the page fault service time to 10 ms in a computer with average memory access time being 20 ns. If one page fault is generated for every 10⁶ memory accesses, what is the effective access time for the memory?

A thread is usually defined as a "light weight process" because an operating system (OS) maintains smaller data structures for a thread than for a process. In relation to this, which of the following is TRUE?

Let the time taken to switch between user and kernel modes of execution be t₁ while the time taken to switch between two processes be t₂. Which of the following is TRUE?

Consider the following table of arrival time and burst time for three processes P0, P1 and P2.

The pre-emptive shortest job first scheduling algorithm is used. Scheduling is carried out only at arrival or completion of processes. What is the average waiting time for the three processes?

Consider the methods used by processes P1 and P2 for accessing their critical sections whenever needed, as given below. The initial values of shared boolean variables S1 and S2 are randomly assigned.

Which one of the following statements describes the properties achieved?

A system uses FIFO policy for page replacement. It has 4 page frames with no pages loaded to begin with. The system first accesses 100 distinct pages in some order and then accesses the same 100 pages but now in the reverse order. How many page faults will occur?

Which of the following statements are true?

I. Shortest remaining time first scheduling may cause starvation
II. Preemptive scheduling may cause starvation
III. Round robin is better than FCFS in terms of response time

The following program consists of 3 concurrent processes and 3 binary semaphores.The semaphores are initialized as S0 = 1, S1 = 0, S2 = 0.

How many times will process P0 print '0'?

A system has n resources R₀,...,R_n-1,and k processes P₀,....P_k-1.The implementation of the resource request logic of each process P_i is as follows:

if (i % 2 == 0) {
      if (i < n) request Ri
      if (i+2 < n) request Ri+2
}
else {
      if (i < n) request Rn-i
      if (i+2 < n) request Rn-i-2
}

In which one of the following situations is a deadlock possible?

In which one of the following page replacement policies, Belady’s anomaly may occur?

The essential content(s) in each entry of a page table is/are

Consider a system with 4 types of resources R1 (3 units), R2 (2 units), R3 (3 units), R4 (2 units). A non-preemptive resource allocation policy is used. At any given instance, a request is not entertained if it cannot be completely satisfied. Three processes P1, P2, P3 request the sources as follows if executed independently.

Which one of the following statements is TRUE if all three processes run concurrently starting at time t=0?

Consider a disk system with 100 cylinders. The requests to access the cylinders occur in following sequence:

    4, 34, 10, 7, 19, 73, 2, 15, 6, 20 

Assuming that the head is currently at cylinder 50, what is the time taken to satisfy all requests if it takes 1ms to move from one cylinder to adjacent one and shortest seek time first policy is used?

In the following process state transition diagram for a uniprocessor system, assume that there are always some processes in the ready state:

Now consider the following statements:

I. If a process makes a transition D, it would result in another process making transition A immediately.
II. A process P2 in blocked state can make transition E while another process P1 is in running state.
III. The OS uses preemptive scheduling.
IV. The OS uses non-preemptive scheduling.

Which of the above statements are TRUE?

The enter_CS() and leave_CS() functions to implement critical section of a process are realized using test-and-set instruction as follows:

void enter_CS(X)
{
    while test-and-set(X) ;
}
void leave_CS(X)
{
   X = 0;
}

In the above solution, X is a memory location associated with the CS and is initialized to 0. Now consider the following statements:

I. The above solution to CS problem is deadlock-free.
II. The solution is starvation free.
III. The processes enter CS in FIFO order.
IV More than one process can enter CS at the same time.

Which of the above statements is TRUE?

A multilevel page table is preferred in comparison to a single level page table for translating virtual address to physical address because

The data blocks of a very large file in the Unix file system are allocated using

The P and V operations on counting semaphores, where s is a counting semaphore, are defined as follows:

P(s): s =  s - 1;
       if (s < 0) then wait;
V(s): s = s + 1;
  if (s <= 0) then wakeup a process waiting on s;

Assume that P_b and V_b the wait and signal operations on binary semaphores are provided. Two binary semaphores X_b and Y_b are used to implement the semaphore operations P(s) and V(s) as follows:

P(s): Pb(Xb);
  s = s - 1;
  if (s < 0) {
   Vb(Xb) ;
   Pb(Yb) ;
  }
  else Vb(Xb); 

V(s): Pb(Xb) ;
  s = s + 1;
  if (s <= 0) Vb(Yb) ;
  Vb(Xb) ;

The initial values of X_b and Y_b are respectively

Which of the following statements about synchronous and asynchronous I/O is NOT true?

Which of the following is NOT true of deadlock prevention and deadlock avoidance schemes?

A process executes the following code

for(i=0; i<n; i++) for();

The total number of child processes created is

A processor uses 36 bit physical addresses and 32 bit virtual addresses, with a page frame size of 4 Kbytes. Each page table entry is of size 4 bytes. A three level page table is used for virtual to physical address translation, where the virtual address is used as follows

• Bits 30-31 are used to index into the first level page table
• Bits 21-29 are used to index into the second level page table
• Bits 12-20 are used to index into the third level page table, and
• Bits 0-11 are used as offset within the page

The number of bits required for addressing the next level page table (or page frame) in the page table entry of the first, second and third level page tables are respectively.

Group 1 contains some CPU scheduling algorithms and Group 2 contains some applications. Match entries in Group 1 to entries in Group 2.

     Group I                          Group II
(P) Gang Scheduling              (1) Guaranteed Scheduling
(Q) Rate Monotonic Scheduling    (2) Real-time Scheduling
(R) Fair Share Scheduling        (3) Thread Scheduling

Consider the following statements about user level threads and kernel level threads. Which one of the following statements is FALSE?

An operating system uses Shortest Remaining Time first (SRT) process scheduling algorithm. Consider the arrival times and execution times for the following processes:

 
        Process     Execution time     Arrival time
          P1             20                0
          P2             25                15
          P3             10                30
          P4             15                45

What is the total waiting time for process P2?

A virtual memory system uses First In First Out (FIFO) page replacement policy and allocates a fixed number of frames to a process. Consider the following statements:

P: Increasing the number of page frames allocated to a 
   process sometimes increases the page fault rate.
Q: Some programs do not exhibit locality of reference.

Which one of the following is TRUE?

A single processor system has three resource types X, Y and Z, which are shared by three processes. There are 5 units of each resource type. Consider the following scenario, where the column alloc denotes the number of units of each resource type allocated to each process, and the column request denotes the number of units of each resource type requested by a process in order to complete execution. Which of these processes will finish LAST?

 
    alloc      request
    X Y Z       X Y Z
P0  1 2 1       1 0 3
P1  2 0 1       0 1 2
P2  2 2 1       1 2 0

Two processes, P1 and P2, need to access a critical section of code. Consider the following synchronization construct used by the processes:

  /* P1 */
while (true) {
  wants1 = true;
  while (wants2 == true);
  /* Critical
    Section */
  wants1=false;
}
/* Remainder section */       


/* P2 */
while (true) {
  wants2 = true;
  while (wants1==true);
  /* Critical
    Section */
  wants2 = false;
}
/* Remainder section */ 

Here, wants1 and wants2 are shared variables, which are initialized to false. Which one of the following statements is TRUE about the above construct?

A process has been allocated 3 page frames. Assume that none of the pages of the process are available in the memory initially. The process makes the following sequence of page references (reference string): 1, 2, 1, 3, 7, 4, 5, 6, 3, 1

If optimal page replacement policy is used, how many page faults occur for the above reference string?

A process has been allocated 3 page frames. Assume that none of the pages of the process are available in the memory initially. The process makes the following sequence of page references (reference string): 1, 2, 1, 3, 7, 4, 5, 6, 3, 1

Least Recently Used (LRU) page replacement policy is a practical approximation to optimal page replacement. For the above reference string, how many more page faults occur with LRU than with the optimal page replacement policy?

Consider three CPU-intensive processes, which require 10, 20 and 30 time units and arrive at times 0, 2 and 6, respectively. How many context switches are needed if the operating system implements a shortest remaining time first scheduling algorithm? Do not count the context switches at time zero and at the end.

The atomic fetch-and-set x, y instruction unconditionally sets the memory location x to 1 and fetches the old value of x n y without allowing any intervening access to the memory location x. consider the following implementation of P and V functions on a binary semaphore S.

void P (binary_semaphore *s)
{
    unsigned y;
    unsigned *x = &(s->value);
    do
    {
        fetch-and-set x, y;
    }
    while (y);
}
void V (binary_semaphore *s)
{
    S->value = 0;
} 

Which one of the following is true?

A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of the TLB tag is:

A computer system supports 32-bit virtual addresses as well as 32-bit physical addresses. Since the virtual address space is of the same size as the physical address space, the operating system designers decide to get rid of the virtual memory entirely. Which one of the following is true?

Consider three processes (process id 0, 1, 2 respectively) with compute time bursts 2, 4 and 8 time units. All processes arrive at time zero. Consider the longest remaining time first (LRTF) scheduling algorithm. In LRTF ties are broken by giving priority to the process with the lowest process id. The average turnaround time is:

Consider three processes, all arriving at time zero, with total execution time of 10, 20 and 30 units, respectively. Each process spends the first 20% of execution time doing I/O, the next 70% of time doing computation, and the last 10% of time doing I/O again. The operating system uses a shortest remaining compute time first scheduling algorithm and schedules a new process either when the running process gets blocked on I/O or when the running process finishes its compute burst. Assume that all I/O operations can be overlapped as much as possible. For what percentage of time does the CPU remain idle?

Consider the following snapshot of a system running n processes. Process i is holding x_i instances of a resource R, 1≤i≤n. Currently, all instances of R are occupied. Further, for all i, process i has placed a request for an additional y_i instances while holding the x_i instances it already has. There are exactly two processes p and q such that y_p = y_q = 0. Which one of the following can serve as a necessary condition to guarantee that the system is not approaching a deadlock?

Barrier is a synchronization construct where a set of processes synchronizes globally i.e. each process in the set arrives at the barrier and waits for all others to arrive and then all processes leave the barrier. Let the number of processes in the set be three and S be a binary semaphore with the usual P and V functions. Consider the following C implementation of a barrier with line numbers shown on left.

void barrier (void) {
1:   P(S);
2:   process_arrived++;
3.   V(S);
4:   while (process_arrived !=3);
5:   P(S);
6:   process_left++;
7:   if (process_left==3) {
8:      process_arrived = 0;
9:      process_left = 0;
10:  }
11:  V(S);
} 

The variables process_arrived and process_left are shared among all processes and are initialized to zero. In a concurrent program all the three processes call the barrier function when they need to synchronize globally.

The above implementation of barrier is incorrect. Which one of the following is true?

Barrier is a synchronization construct where a set of processes synchronizes globally i.e. each process in the set arrives at the barrier and waits for all others to arrive and then all processes leave the barrier. Let the number of processes in the set be three and S be a binary semaphore with the usual P and V functions. Consider the following C implementation of a barrier with line numbers shown on left.

void barrier (void) {
1:   P(S);
2:   process_arrived++;
3.   V(S);
4:   while (process_arrived !=3);
5:   P(S);
6:   process_left++;
7:   if (process_left==3) {
8:      process_arrived = 0;
9:      process_left = 0;
10:  }
11:  V(S);
} 

The variables process_arrived and process_left are shared among all processes and are initialized to zero. In a concurrent program all the three processes call the barrier function when they need to synchronize globally.

Which one of the following rectifies the problem in the implementation?

Normally user programs are prevented from handling I/O directly by I/O instructions in them. For CPUs having explicit I/O instructions, such I/O protection is ensured by having the I/O instructions privileged. In a CPU with memory mapped I/O, there is no explicit I/O instruction. Which one of the following is true for a CPU with memory mapped I/O?

Increasing the RAM of a computer typically improves performance because:

Suppose n processes, P₁, …., P_n share m identical resource units, which can be reserved and released one at a time. The maximum resource requirement of process P_i is s_i, where s_i>0. Which one of the following is a sufficient condition for ensuring that deadlock does not occur?

Consider the following code fragment:

  if (fork() == 0)
      { a = a + 5; printf(“%d, %d\n”, a, &a); }
  else { a = a – 5; printf(“%d, %d\n”, a, &a); }

Let u, v be the values printed by the parent process, and x, y be the values printed by the child process. Which one of the following is TRUE?

Consider the following statements with respect to user-level threads and kernel supported threads

(i) context switch is faster with kernel-supported threads
(ii) for user-level threads, a system call can block the entire process
(iii) Kernel supported threads can be scheduled independently
(iv) User level threads are transparent to the kernel

Which of the above statements are true?

Consider an operating system capable of loading and executing a single sequential user process at a time. The disk head scheduling algorithm used is First Come First Served (FCFS). If FCFS is replaced by Shortest Seek Time First (SSTF), claimed by the vendor to give 50% better benchmark results, what is the expected improvement in the I/O performance of user programs?

he minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by

Consider the following set of processes, with the arrival times and the CPU-burst times given in milliseconds.

  Process   Arrival Time    Burst Time
     P1          0              5
     P2          1              3
     P3          2              3
     P4          4              1 

What is the average turnaround time for these processes with the preemptive shortest remaining processing time first (SRPT) algorithm?

Consider a system with a two-level paging scheme in which a regular memory access takes 150 nanoseconds, and servicing a page fault takes 8 milliseconds. An average instruction takes 100 nanoseconds of CPU time, and two memory accesses. The TLB hit ratio is 90%, and the page fault rate is one in every 10,000 instructions. What is the effective average instruction execution time?

Consider two processes P₁ and P₂ accessing the shared variables X and Y protected by two binary semaphores S_X and S_Y respectively, both initialized to 1. P and V denote the usual semaphone operators, where P decrements the semaphore value, and V increments the semaphore value. The pseudo-code of P₁ and P₂ is as follows:

P1 :
 While true do {
   L1 : ................
   L2 : ................
   X = X + 1;
   Y = Y - 1;
   V(SX);
   V(SY);             
 }
P2 :
 While true do {
   L3 : ................   
   L4 : ................
   Y = Y + 1;
   X = Y - 1;
   V(SY);
   V(SX);            
}

In order to avoid deadlock, the correct operators at L₁, L₂, L₃ and L₄ are respectively

A Unix-style i-node has 10 direct pointers and one single, one double and one triple indirect pointers. Disk block size is 1 Kbyte, disk block address is 32 bits, and 48-bit integers are used. What is the maximum possible file size?

In a system with 32 bit virtual addresses and 1 KB page size, use of one-level page tables for virtual to physical address translation is not practical because of

A uni-processor computer system only has two processes, both of which alternate 10ms CPU bursts with 90ms I/O bursts. Both the processes were created at nearly the same time. The I/O of both processes can proceed in parallel. Which of the following scheduling strategies will result in the least CPU utilization (over a long period of time) for this system?

A processor uses 2-level page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both 32 bits wide. The memory is byte addressable. For virtual to physical address translation, the 10 most significant bits of the virtual address are used as index into the first level page table while the next 10 bits are used as index into the second level page table. The 12 least significant bits of the virtual address are used as offset within the page. Assume that the page table entries in both levels of page tables are 4 bytes wide. Further, the processor has a translation look-aside buffer (TLB), with a hit rate of 96%. The TLB caches recently used virtual page numbers and the corresponding physical page numbers. The processor also has a physically addressed cache with a hit rate of 90%. Main memory access time is 10 ns, cache access time is 1 ns, and TLB access time is also 1 ns.

Assuming that no page faults occur, the average time taken to access a virtual address is approximately (to the nearest 0.5 ns)

A processor uses 2-level page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both 32 bits wide. The memory is byte addressable. For virtual to physical address translation, the 10 most significant bits of the virtual address are used as index into the first level page table while the next 10 bits are used as index into the second level page table. The 12 least significant bits of the virtual address are used as offset within the page. Assume that the page table entries in both levels of page tables are 4 bytes wide. Further, the processor has a translation look-aside buffer (TLB), with a hit rate of 96%. The TLB caches recently used virtual page numbers and the corresponding physical page numbers. The processor also has a physically addressed cache with a hit rate of 90%. Main memory access time is 10 ns, cache access time is 1 ns, and TLB access time is also 1 ns.

Suppose a process has only the following pages in its virtual address space: two contiguous code pages starting at virtual address 0x00000000, two contiguous data pages starting at virtual address 0×00400000, and a stack page starting at virtual address 0×FFFFF000. The amount of memory required for storing the page tables of this process is:

Suppose we want to synchronize two concurrent processes P and Q using binary semaphores S and T. The code for the processes P and Q is shown below.

Process P:
while (1) {
W:
   print '0';
   print '0';
X:
}
	
Process Q:
while (1) {
Y:
   print '1';
   print '1';
Z:
}

Synchronization statements can be inserted only at points W, X, Y and Z.

Which of the following will always lead to an output staring with '001100110011'?

Suppose we want to synchronize two concurrent processes P and Q using binary semaphores S and T. The code for the processes P and Q is shown below.

Process P:
while (1) {
W:
   print '0';
   print '0';
X:
}
	
Process Q:
while (1) {
Y:
   print '1';
   print '1';
Z:
}

Synchronization statements can be inserted only at points W, X, Y and Z.

Which of the following will ensure that the output string never contains a substring of the form 01ⁿ0 or 10ⁿ1 where n is odd?

Which of the following scheduling algorithms is non-preemptive?

The optimal page replacement algorithm will select the page that

Dynamic linking can cause security concerns because

Which combination of the following features will suffice to characterize an OS as a multi-programmed OS?

(a) More than one program may be loaded into main memory at the same time for execution.
(b) If a program waits for certain events such as I/O, another program is immediately scheduled for execution.
(c) If the execution of program terminates, another program is immediately scheduled for execution.

In the index allocation scheme of blocks to a file, the maximum possible size of the file depends on

(a) Draw the process state transition diagram of an OS in which (i) each process is in one of the five states: created, ready, running, blocked (i.e. sleep or wait), or terminated, and (ii) only non-preemptive scheduling is used by the OS. Label the transitions appropriately.

(b) The functionality of atomic TEST-AND-SET assembly language instruction is given by the following C function.

 int TEST-AND-SET (int *x)
 {
    int y;
    A1:y=*x;
    A2:*x=1;
    A3:return y;
 } 

(i) Complete the following C functions for implementing code for entering and leaving critical sections based on the above TEST-AND-SET instruction.

 int mutex=0;
 void enter-cs()
 {
 while (…………………………………);
 }
void leave-cs()
 {
 …………………………………..;
 } 

(ii) Is the above solution to the critical section problem deadlock free and starvation-free?

(iii) For the above solution, show by an example that mutual exclusion is not ensured if TEST-AND-SET instruction is not atomic.

A computer system uses 32-bit virtual address, and 32-bit physical address. The physical memory is byte addressable, and the page size is 4 kbytes. It is decided to use two level page tables to translate from virtual address to physical address. Equal number of bits should be used for indexing first level and second level page table, and the size of each page table entry is 4 bytes.

(a) Give a diagram showing how a virtual address would be translated to a physical address.
(b) What is the number of page table entries that can be contained in each page?
(c) How many bits are available for storing protection and other information in each page table entry?

The following solution to the single producer single consumer problem uses semaphores for synchronization.

 #define BUFFSIZE 100
 buffer buf[BUFFSIZE];
 int first=last=0;
 semaphore b_full=0;
 semaphore b_empty=BUFFSIZE;
 
void producer()
 {
 while (1) {
     produce an item;
     p1: …………………..;
     put the item into buff (first);
     first=(first+1)%BUFFSIZE;
     p2: …………………..;
        }
 }
 void consumer()
 { 
while (1) {
             c1:……………………..
             take the item from buf[last];
             last=(last+1)%BUFFSIZE;
             c2: ……………………..;
             consume the item;
          }
 } 

(a) Complete the dotted part of the above solution.
(b) Using another semaphore variable, insert one line statement each immediately after p1, immediately before p2, immediately after c1, and immediately before c2 so that the program works correctly for multiple procedures and consumers.

Which of the following statements is false?

Consider a set of n tasks with known runtimes r₁, r₂, ..., r_n to be run on a uniprocessor machine. Which of the following processor scheduling algorithms will result in the maximum throughput?

Consider a virtual memory system with FIFO page replacement policy. For an arbitrary page access pattern, increasing the number of page frames in main memory will

Which of the following does not interrupt a running process?

Consider a machine with 64 MB physical memory and a 32-bit virtual address space. If the page size is 4 KB, what is the approximate size of the page table?

Consider Peterson’s algorithm for mutual exclusion between two concurrent processes i and j. The program executed by process is shown below.

   repeat   
      flag[i] = true; 
      turn = j; 
      while (P) do no-op; 
      Enter critical section, perform actions, then exit critical 
      section 
      flag[i] = false; 
      Perform other non-critical section actions. 
   until false; 

For the program to guarantee mutual exclusion, the predicate P in the while loop should be.

Two concurrent processes P1 and P2 want to use two resources R1 and R2 in a mutually exclusive manner. Initially, R1 and R2 are free. The programs executed by the two processes are given below.

Program for P1:
                    S1: While (R1 is busy) do no-op;
                    S2: Set R1 ← busy;
                    S3: While (R2 is busy) do no-op;
                    S4: Set R2 ← busy;
                    S5: Use R1 and R2;
                    S6: Set R1 ← free;
                    S7: Set R2 ← free;
Program for P2:
                    Q1: While (R1 is busy) do no-op;
                    Q2: Set R1 ← busy;
                    Q3: While (R1 is busy) do no-op;
                    Q4: Set R1 ← busy;
                    Q5: Use R1 and R2;
                    Q6: Set R2 ← free;
                    Q7: Set R1 ← free; 

(a) Is mutual exclusion guaranteed for R1 and R2? If not, show a possible interleaving of the statements of P1 and P2 such that mutual exclusion is violated (i.e., both P1 and P2 use R1 or R2 at the same time).
(b) Can deadlock occur in the above program? If yes, show a possible interleaving of the statements of P1 and P2 leading to deadlock.
(c) Exchange the statements Q1 and Q3 and statements Q2 and Q4. Is mutual exclusion guaranteed now? Can deadlock occur?

Which of the following need not necessarily be saved on a context switch between processes?

Let m[0] … m[4] be mutexes (binary semaphores) and P[0] … P[4] be processes. Suppose each process P[i] executes the following:

  wait (m[i]); wait(m[(i+1) mode 4]);
  ------
  release (m[i]); release (m[(i+1)mod 4]);  

This could cause:

A graphics card has on board memory of 1MB. Which of the following modes can the card not support?

Suppose the time to service a page fault is on the average 10 milliseconds, while a memory access takes 1 microsecond. Then a 99.99% hit ratio results in average memory access time of

Which of the following is NOT a valid deadlock prevention scheme?

(a) Fill in the boxes below to get a solution for the readers-writers problem, using a single binary semaphore, mutex (initialized to 1) and busy waiting. Write the box numbers (1, 2 and 3), and their contents in your answer book.

     int R = 0, W = 0;
     Reader () {
 L1:        wait (mutex);
            If (W ==0) {
                R = R +1; 
                ▭______(1)
     }
     else {
                ▭______(2)
                goto L1;
                }
                …./* do the read */
                wait (mutex)
                R = R – 1;
                signal (mutex);
          }
          Writer () {
 L2:            wait(mutex);
                If (▭) {______(3)
                    signal (mutex);
                    goto L2;
                }
                W=1;
                signal (mutex);
                …./*do the write*/
                wait(mutex)
                W = 0;
                signal (mutex); 

(b) Can the above solution lead to starvation of writers?

Listed below are some operating system abstractions (in the left column) and the hardware components or mechanism (in the right column) that they are abstractions of. Which of the following matching of pairs is correct?

    A. Thread                      1. Interrupt
    B. Virtual address space       2. Memory
    C. File system                 3. CPU
    D. Signal                      4. Disk 

Which of the following disk scheduling strategies is likely to give the best through put?

System calls are usually invoked by using

A  multi-user,  multi-processing  operating  system  cannot  be  implemented  on hardware that does not support

Which of the following is/are advantage of virtual memory?

Which  of  the  following  actions  is/are  typically  not  performed  by  the  operating system when switching context from process A to process B?

Consider the following program in a language that has dynamic seeping.

   var x: real;
   procedure show:
       begin print(x);end;
   procedure small;
       var x: real;
           begin x: = 0.125; show; end;
   begin x:=0.25
       show; small
       end. 

Then the output of the program is:

A linker reads four modules whose lengths are 200, 800, 600 and 500 words, respectively. If they are loaded in that order, what are the relocation constants?

Which of the following is an example of a spooled device?

When  the  result  of  a  computation  depends  on  the  speed  of  the  processes involved there is said to be

A counting semaphore was initialized to 10. Then 6P (wait) operations and 4V (signal) operations were completed on this semaphore. The resulting value of the semaphore is

A  computer  has  six  tape  drives,  with  n  processes  competing  for  them.  Each process may need two drives. What is the maximum value of n for the system to be deadlock free?

The overlay tree for a program is as shown below:

What will be the size of the partition (in physical memory) required to load (and run) this program?