## Adder

Please wait while the activity loads.

If this activity does not load, try refreshing your browser. Also, this page requires javascript. Please visit using a browser with javascript enabled.

If this activity does not load, try refreshing your browser. Also, this page requires javascript. Please visit using a browser with javascript enabled.

Question 1 |

How many inputs are required in full adder circuit?

2 | |

3 | |

more than two inputs | |

None of the above |

Question 1 Explanation:

● The difference between a half-adder and a full adder is that the full-adder has three inputs and two outputs, whereas half adder has only two inputs and two outputs.

● The first two inputs are A and B and the third input is an input carry as C-IN. When a full-adder logic is designed, you string eight of them together to create a byte-wide adder and cascade the carry bit from one adder to the next.

● Note: Here, answer they are given ambiguous because it takes minimum 3 input line

● The first two inputs are A and B and the third input is an input carry as C-IN. When a full-adder logic is designed, you string eight of them together to create a byte-wide adder and cascade the carry bit from one adder to the next.

● Note: Here, answer they are given ambiguous because it takes minimum 3 input line

Question 2 |

In which of the following adder circuits, the carry look ripple delay is eliminated?

Half Adder | |

Full Adder | |

Parallel adder | |

Carry-Look-Ahead adder |

Question 2 Explanation:

A carry-lookahead adder (CLA) or fast adder is a type of adder used in digital logic. A carry-lookahead adder improves speed by reducing the amount of time required to determine carry bits. It can be contrasted with the simpler, but usually slower, ripple-carry adder (RCA), for which the carry bit is calculated alongside the sum bit, and each bit must wait until the previous carry bit have been calculated to begin calculating its own result and carry bits. The carry-lookahead adder calculates one or more carry bits before the sum, which reduces the wait time to calculate the result of the larger-value bits of the adder.

Question 3 |

The number of full and half adders required to add 16-bit numbers is

8 half adders, 8 full adders | |

1 half adders, 5 full adders | |

16 half adders, 0 full adders | |

4 half adders, 12 full adders |

Question 3 Explanation:

One half adder can add the least significant bit of the two numbers whereas full adders are required to add the remaining 15 bits as they all involve adding carries.

Question 4 |

Which of the following expression is not equivalent to ~x?

x NAND x | |

x NOR x | |

x NAND 1 | |

X NOR 1 |

Question 4 Explanation:

Question 5 |

If half adders and full adders are implemented using gates, then for the addition of two 17 bit numbers (using minimum gates) the number of half adders and full adders required will be

0, 17 | |

16, 1 | |

1, 16 | |

8, 8 |

Question 5 Explanation:

1. An adder is a digital circuit that performs addition of numbers. The half adder adds two binary digits called as augend and addend and produces two outputs as sum and carry; XOR is applied to both inputs to produce sum and AND gate is applied to both inputs to produce carry.

2. The full adder adds 3 one bit numbers, where two can be referred to as operands and one can be referred to as bit carried in. And produces 2-bit output, and these can be referred to as output carry and sum.

Half adder is used to add two numbers of the least significant bits, so one half adder is required. In order to add remaining 16 bits of two numbers , we require 16 full adders

2. The full adder adds 3 one bit numbers, where two can be referred to as operands and one can be referred to as bit carried in. And produces 2-bit output, and these can be referred to as output carry and sum.

Half adder is used to add two numbers of the least significant bits, so one half adder is required. In order to add remaining 16 bits of two numbers , we require 16 full adders

Question 6 |

The logic circuits binary adder which is used to add two 4-bits binary numbers, requires___half adder(s) and _____full adder(s).

4,0 | |

1,3 | |

2,2 | |

3,1 |

Question 6 Explanation:

Half Adder takes two input bits and output sum and carry. Full Adder takes three input bits(which includes one carry bit) and output sum and carry.

One Half- Adder adds least significant bits of the two numbers. Three Full Adders

One Half- Adder adds least significant bits of the two numbers. Three Full Adders

Question 7 |

A full binary adder to add 4 bits requires_____ full adder(s) and ___half adder(s).

1,3 | |

2,2 | |

3,1 | |

4,0 |

Question 7 Explanation:

Half Adder takes two input bits and output sum and carry. Full Adder takes three input bits(which includes one carry bit) and output sum and carry.

There is no carry in to the least significant bits. So one Half- Adder adds least significant bits of the two numbers.

Three Full Adders are used to add remaining bits along with carries.

There is no carry in to the least significant bits. So one Half- Adder adds least significant bits of the two numbers.

Three Full Adders are used to add remaining bits along with carries.

Question 8 |

Consider a full - adder with the following input values:

(a)x = 1, y = 0 and C

(b)x = 0, y = 1 and C

(a)x = 1, y = 0 and C

_{i} (carry input) = 0(b)x = 0, y = 1 and C

_{i} = 1 Compute the values of S(sum) and C_{o} (carry output) for the above input values.S = 1, C _{o} = 0 and S = 0, C_{ o} = 1 | |

S = 1, C _{o} = 0 and S = 1, C_{ o} = 1 | |

S = 1, C _{o} = 1 and S = 1, C_{ o} = 0 | |

S _{0} = 1, C _{o} = 1 and S = 1, C_{ o} = 0 |

Question 8 Explanation:

For the given x and y values, the correct option is A

There are 8 questions to complete.