Adder
Question 1 
Consider an eightbit ripplecarry adder for computing the sum of A and B, where A and B are integers represented in 2’s complement form. If the decimal value of A is one, the decimal value of B that leads to the longest latency for the sum to stabilize is _________.
1  
2  
3  
4 
If we do 2's complement of 1 = 0000 0001, we get 1 = "1111 1111"
So, if B = 1, every carry bit is 1.
Question 2 
A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 microseconds. A 4bit ripplecarry binary adder is implemented by using four full adders. The total propagation time of this 4bit binary adder in microseconds is ____________.
19.1  
19.2  
18.1  
18.2 
Here, each Full Adder is taking 4.8 microseconds. Given adder is a 4 Bit Ripple Carry Adder. So it takes 4*4.8 = 19.2 microseconds.
Question 3 
Consider the ALU shown below.
If the operands are in 2's complement representation, which of the following operations can be performed by suitably setting the control lines K and C_{0} only (+ and  denote addition and subtraction respectively)?
A + B, and A – B, but not A + 1  
A + B, and A + 1, but not A – B  
A + B, but not A – B or A + 1  
A + B, and A – B, and A + 1

1) A+B when K=0 and C_{0} = 0. It is binary adder which performs addition of two binary numbers.
2) A  B = A+ B' + 1 when K=1 and C_{0} = 1 ;
Here XOR gates produce B' if K=1. Since 1⊕b= b'.
"1" in (A+B+1) is coming from C_{0}.
Note: 2's complement of B is (B'+1). 3) A+1 when B=0, K=0, C_{0}= 1.
Increments A.
Question 4 
The number of full and halfadders required to add 16bit numbers is
8 halfadders, 8 fulladders  
1 halfadder, 15 fulladders  
16 halfadders, 0 fulladders  
4 halfadders, 12 fulladders 
But for rest of bits we need full address since carry from previous addition has to be included into the addition operation.
So, in total 1 half adder and 15 full adders are required.
Question 5 
An Nbit carry look ahead adder, where N is a multiple of 4, employs ICs 74181 (4 bit ALU) and 74182 (4 bit carry look ahead generator).
The minimum addition time using the best architecture for this adder is
proportional to N  
proportional to log N  
a constant  
None of the above 
Question 6 
Consider the circuit given below which has a four bit binary number b_{3}b_{2}b_{1}b_{0} as input and a five bit binary number d_{4}d_{3}d_{2}d_{1}d_{0} as output. The circuit implements:
Binary of Hex conversion
 
Binary to BCD conversion  
Binary to grey code conversion  
Binary to radix12 conversion 
Whenever, b_{2} = b_{3} = 1, then only 0100, i.e., 4 is added to the given binary number. Lets write all possibilities for b.
Note that the last 4 combinations leads to b_{3} and b_{2} as 1. So, in these combinations only 0010 will be added.
1100 is 12
1101 is 13
1110 is 14
1111 is 15
in binary unsigned number system.
1100 + 0100 = 10000
1101 + 0100 = 10001, and so on.
This is conversion to radix 12.
Question 7 
2  
3  
more than two inputs  
None of the above 
● The first two inputs are A and B and the third input is an input carry as CIN. When a fulladder logic is designed, you string eight of them together to create a bytewide adder and cascade the carry bit from one adder to the next.
● Note: Here, answer they are given ambiguous because it takes minimum 3 input line
Question 8 
Half Adder  
Full Adder  
Parallel adder  
CarryLookAhead adder 
Question 9 
8 half adders, 8 full adders  
1 half adders, 5 full adders  
16 half adders, 0 full adders  
4 half adders, 12 full adders 
Question 10 
x NAND x  
x NOR x  
x NAND 1  
X NOR 1 
Question 11 
0, 17  
16, 1  
1, 16  
8, 8 
2. The full adder adds 3 one bit numbers, where two can be referred to as operands and one can be referred to as bit carried in. And produces 2bit output, and these can be referred to as output carry and sum.
Half adder is used to add two numbers of the least significant bits, so one half adder is required. In order to add remaining 16 bits of two numbers , we require 16 full adders
Question 12 
4,0  
1,3  
2,2  
3,1 
One Half Adder adds least significant bits of the two numbers. Three Full Adders
Question 13 
1,3  
2,2  
3,1  
4,0 
There is no carry in to the least significant bits. So one Half Adder adds least significant bits of the two numbers.
Three Full Adders are used to add remaining bits along with carries.
Question 14 
(a)x = 1, y = 0 and C _{i} (carry input) = 0
(b)x = 0, y = 1 and C _{i} = 1 Compute the values of S(sum) and C _{o} (carry output) for the above input values.
S = 1, C _{o} = 0 and S = 0, C_{ o} = 1  
S = 1, C _{o} = 0 and S = 1, C_{ o} = 1  
S = 1, C _{o} = 1 and S = 1, C_{ o} = 0  
S_{0} = 1, C _{o} = 1 and S = 1, C_{ o} = 0 
For the given x and y values, the correct option is A