A control algorithm is implemented by the NAND – gate circuitry given in figure below, which A and B are state variable implemented by D flip-flops, and P is control input. Develop the state transition table for this controller.

Assume that only half adders are available in your laboratory. Show that any binary Boolean function can be implemented using half adders only.

A ROM is used to store the Truth table for a binary multiple unit that will multiply two 4-bit numbers. The size of the ROM (number of words × number of  bits) that is required to accommodate the Truth table is M words × N bits. Write the values of M and N.

For the initial state of 000, the function performed by the arrangement of the J-K flip-flops in figure is:

Convert the following numbers in the given bases into their equivalents in the desired bases.
(a) 110.101)₂ = x)₁₀
(b) 1118)₁₀ = y)_H

Identify the logic function performed by the circuit shown in figure.

Following 7 bit single error correcting Hamming coded message is received. (figure below):

Determine if the message is correct (assuming that at most 1 bit could be corrupted). If the message contains an error find the bit which is erroneous and gives the correct message.

Write a program in 8085 Assembly language to Add two 16-bit unsigned BCD(8-4-2-1 Binary Coded Decimal) number. Assume the two input operands are in BC and DE Register pairs. The result should be placed in the register pair BC. (Higher order register in the register pair contains higher order digits of operand)

Find the contents of the flip-flop Q₂, Q₁ and Q₀ in the circuit of figure, after giving four clock pulses to the clock terminal. Assume Q₂Q₁Q₀ = 000 initially.

(a) Assume that a CPU has only two registers R₁ and R₂ and that only the following instruction is available XOR R_i, R_j; {R_j ← R_i ⊕ R_j, for i,j = 1,2}
Using this XOR instruction, find an instruction sequence in order to exchange the contents of the registers R₁ and R₂.

(b) The line p of the circuit shown in figure has stuck at 1 fault. Determine an input test to detect the fault.

Consider n-bit (including sign bit) 2’s complement representation of integer number. The range of integer values, N, that can be represented is _________ ≤ N ≤ _________

The number of flip-flops required to construct a binary modulo N counter is __________.

The logic expression for the output of the circuit shown in figure below is:

(a) An asynchronous serial communication controller that uses a start stop scheme for controlling the serial I/O of a system is programmed for a string of length seven bits, one parity bit (odd parity) and one step bit. The transmission rate is 1200 bits/second.
(i) What is the complete bit stream that is transmitted for the string ‘0110101’?
(ii) How many such strings can be transmitted per second?

(b) Consider a CRT display that has a text mode display format of 80 × 25 characters with a 9 × 12 character cell. What is the size of the video buffer RAM for the display to be used in monochrome (1 bit per pixel) graphics mode?

(a) Implement a circuit having the following output expression using an inverter and NAND gate .
(b) What is the equivalent minimal Boolean expression (in sum of products form) for the Karnaugh map given below?

The number of 1’s in the binary representation of
(3*4096 + 15*256 + 5*16 + 3) are:

What values of A, B, C and D satisfy the following simultaneous Boolean equations?

Consider three registers R1, R2 and R3 that store numbers in IEEE-754 single precision floating point format. Assume that R1 and R2 contain the values (in hexadecimal notation) 0x42200000 and 0xC1200000, respectively.

If R3 = R1/R2, what is the value stored in R3?

Consider the Boolean function z(a,b,c).

Which one of the following minterm lists represents the circuit given above?

If there are m input lines and n output lines for a decoder that is used to uniquely address a byte addressable 1 KB RAM, then the minimum value of m + n is ____.

A multiplexer is placed between a group of 32 registers and an accumulator to regulate data movement such that at any given point in time the content of only one register will move to the accumulator. The minimum number of select lines needed for the multiplexer is _____.

Consider the synchronous sequential circuit in the below figure.

(a) Draw a state diagram, which is implemented by the circuit. Use the following names for the states corresponding to the values of flip-flops as given below.

(b) Given that the initial state of the circuit is S₄, identify the set of states, which are not reachable.

A logic network has two data inputs A and B, and two control inputs C₀ and C₁. It implements the function F according to the following table.

Implement the circuit using one 4 to 1 Multiplexer, one 2-input Exclusive OR gate, one 2-input AND gate, one 2-input OR gate and one Inverter.

What is the equivalent Boolean expression in product-of-sums form for the Karnaugh map given below.

Consider the circuit in below figure. f implements

Consider the circuit given below which has a four bit binary number b₃b₂b₁b₀ as input and a five bit binary number d₄d₃d₂d₁d₀ as output. The circuit implements:

A ROM is sued to store the table for multiplication of two 8-bit unsigned integers. The size of ROM required is

Both’s algorithm for integer multiplication gives worst performance when the multiplier pattern is

Consider the following floating point number representation

The exponent is in 2's complement representation and mantissa is in the sign magnitude representation. The range of the magnitude of the normalized numbers in this representation is

Consider three 4-variable functions f₁, f₂ and f₃, which are expressed in sum-of-minterms as

f1 = Σ(0, 2, 5, 8, 14),  f2 = Σ(2, 3, 6, 8, 14, 15),  f3 = Σ(2, 7, 11, 14)

For the following circuit with one AND gate and one XOR gate, the output function f can be expressed as:

What is the minimum number of 2-input NOR gates required to implement a 4-variable function function expressed in sum-of-minterms form as f = Σ(0, 2, 5, 7, 8, 10, 13, 15)? Assume that all the inputs and their complements are available.

Which one of the following is NOT a valid identity?

Consider Z = X - Y, where X, Y and Z are all in sign-magnitude form. X and Y are each represented in n bits. To avoid overflow, the representation of Z would require a minimum of:

In 16-bit 2's complement representation, the decimal number -28 is:

Two numbers are chosen independently and uniformly at random from the set {1, 2, ..., 13}. The probability (rounded off to 3 decimal places) that their 4-bit (unsigned) binary representations have the same most significant bit is ______.

Consider a logic circuit shown in figure below. The functions f₁, f₂ and f (in canonical sum of products form in decimal notation) are:

f1(w,x,y,z) = ∑8,9,10
f2(w,x,y,z) = ∑7,8,12,13,14,15
f(w,x,y,z) = ∑8,9 

The function f₃ is

Given √224)_r = 13)_r.
The value of the radix r is:

Let f(x, y, z) = x' + y'x + xz be a switching function. Which one of the following is valid?

An N-bit carry look ahead adder, where N is a multiple of 4, employs ICs 74181 (4 bit ALU) and 74182 (4 bit carry look ahead generator).

The minimum addition time using the best architecture for this adder is

Let * be defined as x * y = x' + y. Let z = x * y. Value of z * x is

Design a synchronous counter to go through the following states:

  1, 4, 2, 3, 1, 4, 2, 3, 1, 4,........... 

(a) The implication gate shown below, has two inputs (x and y), the output is 1 except when x=1 and y=0. Realize f = x'y + xy' using only four implication gates.

(b) Show that the implication gate is functionally complete.

Suppose the domain set of an attribute consists of signed four digit numbers. What is the percentage of reduction in storage space of this attribute if  it is stored as an integer rather than in character form?

Which of the following operations is commutative but not associative?

The function represented by the Karnaugh map given below is: