Interruption

Question 1

Consider the following statements.

    I. Daisy chaining is used to assign priorities in attending interrupts.
    II. When a device raises a vectored interrupt, the CPU does polling to identify the source of the interrupt.
    III. In polling, the CPU periodically checks the status bits to know if any device needs its attention.
    IV. During DMA, both the CPU and DMA controller can be bus masters at the same time.

Which of the above statements is/are TRUE?

A
I and IV only
B
I and II only
C
III only
D
I and III only
       Computer-Organization       Interruption       GATE 2020
Question 1 Explanation: 
Statement-I is true as daisy chaining is used to assign priorities in attending interrupts.
Statement-II is false as vectored interrupt doesn’t involve polling but non-vectored interrupt involves polling.
Statement-III is true as polling means that CPU periodically checks the status bits to know if any device needs attention.
Statement-IV is false as during DMA only one of the CPU or DMA can be bus master at a time.
Question 2
External Interrupt may not arise because of:
A
illegal or erroneous use of an instruction
B
a timing devices
C
external sources
D
I/O devices
       Computer-Organization       Interruption       Nielit Scientist-B CS 4-12-2016
Question 2 Explanation: 
● An external interrupt is a computer system interrupt that happens as a result of outside interference, whether that’s from the user, from peripherals, from other hardware devices or through a network.
● These are different than internal interrupts that happen automatically as the machine reads through program instructions
Question 3
Hardware mechanism that enables a device to notify the CPU is called:
A
Busy-waiting
B
Interrupt
C
Polling
D
DMA
       Computer-Organization       Interruption       KVS 22-12-2018 Part-B
Question 3 Explanation: 
→ An interrupt is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention.
→ An interrupt alerts the processor to a high-priority condition requiring the interruption of the current code the processor is executing.
There are 3 questions to complete.

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