Interruption
Question 1 |
Consider the following statements.
- I. Daisy chaining is used to assign priorities in attending interrupts.
II. When a device raises a vectored interrupt, the CPU does polling to identify the source of the interrupt.
III. In polling, the CPU periodically checks the status bits to know if any device needs its attention.
IV. During DMA, both the CPU and DMA controller can be bus masters at the same time.
Which of the above statements is/are TRUE?
I and IV only | |
I and II only
| |
III only | |
I and III only
|
Question 1 Explanation:
Statement-I is true as daisy chaining is used to assign priorities in attending interrupts.
Statement-II is false as vectored interrupt doesn’t involve polling but non-vectored interrupt involves polling.
Statement-III is true as polling means that CPU periodically checks the status bits to know if any device needs attention.
Statement-IV is false as during DMA only one of the CPU or DMA can be bus master at a time.
Statement-II is false as vectored interrupt doesn’t involve polling but non-vectored interrupt involves polling.
Statement-III is true as polling means that CPU periodically checks the status bits to know if any device needs attention.
Statement-IV is false as during DMA only one of the CPU or DMA can be bus master at a time.
Question 2 |
Which of the following is true with respect to interrupts?
Unless enabled, a CPU will not be able to process interrupts | |
Loop instructions can not be interrupted till they complete | |
A processor checks for interrupts before executing a new instruction | |
Only level-triggered interrupts are possible on microprocessor |
Question 2 Explanation:
True, unless the interrupt is enabled,even if there will be an interrupt ,the CPU will not be able to process interrupts.
False ,because loop may contain more than one instruction.And the rule is that single instruction cannot be interrupted till they complete.
False, because a processor checks for the interrupts before fetching new instructions.
False.even edge triggered interrupts are possible.
False ,because loop may contain more than one instruction.And the rule is that single instruction cannot be interrupted till they complete.
False, because a processor checks for the interrupts before fetching new instructions.
False.even edge triggered interrupts are possible.
Question 3 |
A processor needs software interrupt to
Test the interrupt system of the processor | |
Implement co-routines | |
Obtain system services which need execution of the privileged instructions | |
Return from subroutines
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Question 3 Explanation:
A processor needs software interrupt to Obtain system services which need execution of the privileged instructions
There are 3 questions to complete.