## Multiplexer

 Question 1

What is the minimum size of ROM required to store the complete truth table of an 8-bit × 8-bit multiplier?

 A 32 K × 16 bits B 64 K × 16 bits C 16 K × 32 bits D 64 K × 32 bits
Digital-Logic-Design       Multiplexer       GATE 2004-IT
Question 1 Explanation:
Input: 2 lines, 8 bits each
Possible combination in ROM = (28 × (28) [size of truth table]
= 216
= 64 KB
= 64 K ×16 bits
 Question 2

Consider the circuit in below figure. f implements A B A + B + C C A ⊕ B ⊕ C D AB + BC + CA
Digital-Logic-Design       Multiplexer       GATE 1996
Question 2 Explanation: Question 3

A logic network has two data inputs A and B, and two control inputs C0 and C1. It implements the function F according to the following table. Implement the circuit using one 4 to 1 Multiplexer, one 2-input Exclusive OR gate, one 2-input AND gate, one 2-input OR gate and one Inverter.

 A Theory Explanation.
Digital-Logic-Design       Multiplexer       GATE 1996
 Question 4

A multiplexor with a 4 bit data select input is a

 A 4:1 multiplexor B 2:1 multiplexor C 16:1 multiplexor D 8:1 multiplexor
Digital-Logic-Design       Multiplexer       GATE 1998
Question 4 Explanation:
For 'n' bit data it selects 2n : 1 input
For 4 bit data it selects 24 : 1 = 16: 1 input
There are 4 questions to complete.

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