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OOPS
October 3, 2023
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October 3, 2023
OOPS
October 3, 2023
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October 3, 2023

Operating-Systems

Question 6

A CPU has only three instructions I1, I2 and I3, which use the following signals in time steps T1-T5:

I1 : 
T1 : Ain, Bout, Cin 
T2 : PCout, Bin 
T3 : Zout, Ain 
T4 : Bin, Cout 
T5 : End 
I2 : 
T1 : Cin, Bout, Din 
T2 : Aout, Bin 
T3 : Zout, Ain 
T4 : Bin, Cout 
T5 : End 
I3 : 
T1 : Din, Aout 
T2 : Ain, Bout 
T3 : Zout, Ain 
T4 : Dout, Ain 
T5 : End  

Which of the following logic functions will generate the hardwired control for the signal Ain ?

A
T1.I1 + T2.I3 + T4.I3 + T3
B
(T1 + T2 + T3).I3 + T1.I1
C
(T1 + T2 ).I1 + (T2 + T4).I3 + T3
D
(T1 + T2 ).I2 + (T1 + T3).I1 + T3
Question 6 Explanation: 
We just have to see which option gives 1 whenever Ain is 1 and 0 otherwise.
So, Ain is 1 in T3 of I1, I2 and I3. Also during T1, and T2 and T4 of I3. So, answer will be
T1.I1 + T2.I3 + T4.I3 + T3.I1 + T3.I2 + T3.I3
Since, CPU is having only 3 instructions, T3.I1 + T3.I2 + T3.I3 can be replaced by T3.
So, T1.I1 + T2.I3 + T4.I3 + T3
Correct Answer: A
Question 6 Explanation: 
We just have to see which option gives 1 whenever Ain is 1 and 0 otherwise.
So, Ain is 1 in T3 of I1, I2 and I3. Also during T1, and T2 and T4 of I3. So, answer will be
T1.I1 + T2.I3 + T4.I3 + T3.I1 + T3.I2 + T3.I3
Since, CPU is having only 3 instructions, T3.I1 + T3.I2 + T3.I3 can be replaced by T3.
So, T1.I1 + T2.I3 + T4.I3 + T3
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