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Compiler-Design
October 6, 2023
Digital-Logic-Design
October 6, 2023
Compiler-Design
October 6, 2023
Digital-Logic-Design
October 6, 2023

Digital-Logic-Design

Question 3

Using a 4-bit 2’s complement arithmetic, which of the following additions will result in an overflow?

1. 1100 
  +1100 
2. 0011 
  +0111 
3. 1111 
  +0111 
A
1 only
B
2 only
C
3 only
D
1 and 3 only
Question 3 Explanation: 
In 2’s complement arithmetic, overflow happens only when
1) Sign bit of two input numbers is 0, and the result has sign bit 1.
2) Sign bit of two input numbers is 1, and the result has sign bit 0.
So, only (2) causes overflow.
Correct Answer: B
Question 3 Explanation: 
In 2’s complement arithmetic, overflow happens only when
1) Sign bit of two input numbers is 0, and the result has sign bit 1.
2) Sign bit of two input numbers is 1, and the result has sign bit 0.
So, only (2) causes overflow.
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