Digital-Logic-Design
October 10, 2023Operating-Systems
October 10, 2023Operating-Systems
|
Question 418
|
A CPU generates 32 bit virtual addresses. The page size is 4KB. The processor has a Translation Lookaside Buffer(TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of the TLB tag is
|
11 bits
|
|
|
13 bits
|
|
|
15 bits
|
|
|
20 bits
|
Question 418 Explanation:
Page size = 4 KB = 4 × 210 Bytes = 212 Bytes
Virtual Address = 32 bit
No. of bits needed to address the page frame = 32 – 12 = 20
TLB can hold 128 page table entries with 4-way set associative
⇒ 128/4=32=25
→ 5 bits are needed to address a set.
→ The size of TLB tag = 20 – 5 = 15 bits
Virtual Address = 32 bit
No. of bits needed to address the page frame = 32 – 12 = 20
TLB can hold 128 page table entries with 4-way set associative
⇒ 128/4=32=25
→ 5 bits are needed to address a set.
→ The size of TLB tag = 20 – 5 = 15 bits
Correct Answer: C
Question 418 Explanation:
Page size = 4 KB = 4 × 210 Bytes = 212 Bytes
Virtual Address = 32 bit
No. of bits needed to address the page frame = 32 – 12 = 20
TLB can hold 128 page table entries with 4-way set associative
⇒ 128/4=32=25
→ 5 bits are needed to address a set.
→ The size of TLB tag = 20 – 5 = 15 bits
Virtual Address = 32 bit
No. of bits needed to address the page frame = 32 – 12 = 20
TLB can hold 128 page table entries with 4-way set associative
⇒ 128/4=32=25
→ 5 bits are needed to address a set.
→ The size of TLB tag = 20 – 5 = 15 bits
Subscribe
Login
0 Comments