Registers

Question 1

Consider the following data path diagram.

Consider an instruction: R0 ← R1 + R2. The following steps are used to execute it over the given data path. Assume that PC is incremented appropriately. The subscripts r and w indicate read and write operations, respectively.

1. R2r, TEMP1r, ALUadd, TEMP2w
2. R1r, TEMP1w
3. PCr, MARw, MEMr
4. TEMP2r, ROw
5. MDRr, IRw 

Which one of the following is the correct order of execution of the above steps?

A
3, 5, 1, 2, 4
B
3, 5, 2, 1, 4
C
1, 2, 4, 3, 5
D
2, 1, 4, 5, 3
Question 1 Explanation: 
To execute the given instruction R0 ← R1 + R2.
First the PC value has to be moved into MAR (step-3 from the given sequence), then the instruction has to be fetched(step-5 from the given sequence). Then Temp1 is loaded with the value of R1 (step-2 from the given sequence), then the addition operation is performed by accessing the R2 value directly and adding it to Temp1 value and storing the result in Temp2 (step-1 from the given sequence).
Finally the result from Temp2 is stored in R0 (step-4 from the given sequence).
Hence the correct sequence is (3, 5, 2, 1, 4).
Question 2

A processor has 64 registers and uses 16-bit instruction format. It has two types of instructions: I-type and R-type. Each I-type instruction contains an opcode, a register name, and a 4-bit immediate value. Each R-type instruction contains an opcode and two register names. If there are 8 distinct I-type opcodes, then the maximum number of distinct R-type opcodes is _____.

A
14
Question 2 Explanation: 
Instruction is of size 16-bits.
All possible binary combinations = 216
There are 64 registers, so no. of bits needed to identify a register = 6
I-type instruction has (Opcode+Register+4-bit immediate value). There are 8 distinct I-type instructions.
All the binary combinations possible with the I-type instructions are = 8*26*24 = 213
R-type instructions have 2 register operands.
Let x be the number of R-type instructions.
All the possible binary combinations of R-type instructions = x*26*26 = x*212
The sum of I-type and R-type binary combinations should be equal to 216.
x*212 + 213 = 216
212 (x+2) = 216
x+2 = 24
x = 16 - 2 = 14
Question 3
Statement associated with registers of a CPU are given. Identify the false statement
A
The program counter holds the memory address of the instruction in execution
B
Only opcode is transferred to the control unit
C
An instruction in the instruction register consists of the opcode and the operand
D
The value of the counter is incremented by 1 once its value has been read to the memory address register
Question 3 Explanation: 
Program counter always holds the address of the next instruction, not the current instruction in execution. Hence the statement in option A is false.
Question 4

Program Counter register contains address of the

A
Memory data
B
Next instruction to be executed by the CPU
C
Current instruction being executed by the CPU
D
Address (i,e. indirect address) of next instruction to be executed by the CPU
Question 4 Explanation: 
Program counter contains the address of the next instruction to be executed by the CPU.
There are 4 questions to complete.

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