###### Higher-Education-and-Politics

August 23, 2023###### Operating-Systems

August 24, 2023# ISRO CS 2020

Question 3 |

Minimum number of NAND gates required to implement the following binary equation

4 | |

5 | |

3 | |

6 |

Question 3 Explanation:

AND-OR (or SOP)realization is easily convertible into NAND-NAND realization.

NOT-OR is equivalent to NAND.

Y = (A’+B’) (C+D)

Y = (A’+B’)C + (A’+B’)D

Let X= (A’+B’) , Y= C, and Z= D

One NAND gate is needed for implementing X= (A’ + B’).

Y= XY + XZ

Y= [(XY)’ (XZ)’]’

Three NAND gates are needed for [(XY)’ (XZ)’]’.

Total Four NAND gates are required to implement thY = (A’+B’) (C+D).

NOT-OR is equivalent to NAND.

Y = (A’+B’) (C+D)

Y = (A’+B’)C + (A’+B’)D

Let X= (A’+B’) , Y= C, and Z= D

One NAND gate is needed for implementing X= (A’ + B’).

Y= XY + XZ

Y= [(XY)’ (XZ)’]’

Three NAND gates are needed for [(XY)’ (XZ)’]’.

Total Four NAND gates are required to implement thY = (A’+B’) (C+D).

Correct Answer: A

Question 3 Explanation:

AND-OR (or SOP)realization is easily convertible into NAND-NAND realization.

NOT-OR is equivalent to NAND.

Y = (A’+B’) (C+D)

Y = (A’+B’)C + (A’+B’)D

Let X= (A’+B’) , Y= C, and Z= D

One NAND gate is needed for implementing X= (A’ + B’).

Y= XY + XZ

Y= [(XY)’ (XZ)’]’

Three NAND gates are needed for [(XY)’ (XZ)’]’.

Total Four NAND gates are required to implement thY = (A’+B’) (C+D).

NOT-OR is equivalent to NAND.

Y = (A’+B’) (C+D)

Y = (A’+B’)C + (A’+B’)D

Let X= (A’+B’) , Y= C, and Z= D

One NAND gate is needed for implementing X= (A’ + B’).

Y= XY + XZ

Y= [(XY)’ (XZ)’]’

Three NAND gates are needed for [(XY)’ (XZ)’]’.

Total Four NAND gates are required to implement thY = (A’+B’) (C+D).

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