K-Map

(a) Analyse the circuit in figure and complete the following table:

(b) Find the minimum sum of products form of the logic function.

 f(A,B,C,D) = ∑m(0,2,8,10,15) + ∑d(3,11,12,14)

Where m and d denote the min-terms and don’t cares respectively.

(c) Find the maximum clock frequency at which the counter in figure, can be operated. Assume that the propagation delay through each flip-flop and AND gate is 10 ns. Also assume that the setup time for the JK inputs of the flipflops is negligible.