GATE 1992

Question 1

The Boolean function in sum of products form where K-map is given below (figure) is:___________

A
ABC + B'C' + A'C'
       Digital-Logic-Design       K-Map
Question 1 Explanation: 
We can write this as

⇒ ABC + B'C' + A'C'
Question 2

Consider a 3-bit error detection and 1-bit error correction hamming code for 4-bit date. The extra parity bits required would be ________ and the 3-bit error detection is possible because the code has a minimum distance of ________

A
Fill in the blanks
       Digital-Logic-Design       Parity-Bits
Question 3

Many microprocessors have a specified lower limit on clock frequency (apart from the maximum clock frequency limit) because ______

A
clock frequency can't go below this value.
       Computer-Organization       Microprocessor
Question 3 Explanation: 
Clock frequency becomes low memory time period of clock becomes high. When this time period increases beyond the time period in which the non-volatile memory contents must be refreshed, we loose those contents. So clock frequency can't go below this value.
Question 4

Many of the advanced microprocessors prefetch instructions and store it in an instruction buffer to speed up processing. This speed up is achieved because _________

A
prefetching the instructions to be executed can save considerable amount of waiting time.
       Computer-Organization       Microprocessor
Question 4 Explanation: 
Because CPU is faster than memory. Fetching the instructions from memory would require considerable amount of time while CPU is much faster. So, prefetching the instructions to be executed can save considerable amount of waiting time.
Question 5

A simple and reliable data transfer can be accomplished by using the ‘handshake protocol’. It accomplishes reliable data transfer because for every data item sent by the transmitter __________.

A
in this case receiver has to respond that receiver can be able to receive the data item.
       Computer-Networks       Handshake-Protocol
Question 6

In an 11-bit computer instruction format, the size of address field is 4-bits. The computer uses expanding OP code technique and has 5 two-address instructions and 32 two-address instructions and the number of zero-address instructions it can support is _________

A
256
       Computer-Organization       OP-Code
Question 6 Explanation: 
In encoding no. of possible instructions = 211 = 2048
The possibility of no. of encoding taken by two-address instructions = 5×24×24 = 1280
By one-address instructions = 32×24 = 512
So, the possibility of zero-address instructions = 2048 - (1280 + 512) = 256
Question 7

Macro expansion is done in pass one instead of pass two in a pass macro assembler because _________

A
all macro definitions are processed during the first pass only due to all macro expansions done during pass 1 only not in pass 2.
       Computer-Organization       Macro-Expansion
Question 8

The purpose of instruction location counter in an assembler is _______

A
used to assign storage address to the program's statements.
       Computer-Organization       Counters
Question 8 Explanation: 
is used to assign storage address to the program's statements. As the instruction of a source module are being assembled, the location counter keeps track of current location in storage.
Question 9

Complexity of Kruskal’s algorithm for finding the minimum spanning tree of an undirected graph containing n vertices and m edges if the edges are sorted is __________

A
O(m log n)
       Algorithms       Krushkal\'s-Algorithm
Question 9 Explanation: 
Though the edges are to be sorted still due to union find operation complexity is O(m log n).
Question 10

Maximum number of edges in a planar graph with n vertices is ________

A
3n - 6
       Engineering-Mathematics       Graph-Theory
Question 10 Explanation: 
The maximum is 3(n - 8) for every n>2.
⇒ (3n - 2) = 3n - 6
Question 11

The operation which is commutative but not associative is:

A
AND
B
OR
C
EX-OR
D
NAND
       Digital-Logic-Design       Operators
Question 11 Explanation: 
NAND and NOR operation follow commutativity but do not follow associativity.
Question 12

All digital circuits can be realized using only

A
Ex-OR gates
B
Multiplexers
C
Half adders
D
OR gates
E
Both B and C
       Digital-Logic-Design       Operators
Question 12 Explanation: 
NOR gate, NAND gate, Multiplexers and Half adders can also be used to realize all digital circuits.
There are 12 questions to complete.

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