Combinational circuits have no memory. Combinational circuits are defined as the time independent circuits which do not depend upon previous inputs to generate any output are termed as combinational circuits.
Examples: Encoder, Decoder, Multiplexer, Demultiplexer
Sequential circuits have memory. Sequential circuits are those which are dependent on clock cycles and depends on present as well as past inputs to generate any output.
Example: Flip-flops, Counters

DAD: - Add register pair to HL register. The 16-bit contents of the specified register pair are added to the contents of the HL register and the sum is stored in the HL register. The contents of the source register pair are not altered. If the result is larger than 16 bits, the CY flag is set. No other flags are affected.
HL = HL + DE means DAD D

Status register(SR):
→ A status register is a collection of status flag bits for a processor.
→ The status register is a hardware register that contains information about the state of the processor. Individual bits are implicitly or explicitly read and/or written by the machine code instructions executing on the processor.
→ The status register lets an instruction take action contingent on the outcome of a previous instruction.
Interrupt service register(ISR):
→ Interrupt service routine(ISR) is a special block of code associated with a specific interrupt condition.
→ Interrupt handlers are initiated by hardware interrupts, software interrupt instructions, or software exceptions, and are used for implementing device drivers or transitions between protected modes of operation, such as system calls.
Interrupt mask register(IMR):
→ The Interrupt Mask Register is a read and write register.
→ This register enables or masks interrupts from being triggered on the external pins of the Cache Controller.
→ The IMR is used to disable (Mask) or enable (Unmask) individual interrupt request inputs. This is also an 8-bit register.
Interrupt request register(IRR):
→ It stores all the interrupt inputs that are requesting service.
→ It is an 8-bit register, one bit for each interrupt request.
→ It keeps track of which interrupt inputs are asking for service. If an interrupt input is unmasked, and has an interrupt signal on it, then the corresponding bit in the IRR will be set.
→ The content of this register can be read to know the status of pending interrupts.

→ A cache memory contains copies of data stored in the main memory. When a change of data in a cache takes place (ex. a modification due to a processor write) the contents of the main memory and cache memory cells with the same address, are different. To eliminate this lack of data coherency two methods are applied:
write through, the new cache contents is written down to the main memory immediately after the write to the cache memory,
write back, the new cache contents is not written down to the main memory immediately after the change, but only when the given block of data is replaced by a new block fetched from the main memory or an upper level cache. After a data write to the cache, only state bits are changed in the modified block, indicating that the block has been modified (a dirty block).
The write back updating is more time efficient, since the block cells that were modified many times while being in the cache, are updated in the main memory only once.

Object-oriented databases have adopted many of the concepts that were developed originally for object-oriented programming languages.
These include:
Object identity: Objects have unique identities that are independent of their attribute values and are generated by the ODMS.
Type constructors: Complex object structures can be constructed by applying in a nested manner a set of basic constructors, such as tuple, set, list, array, and bag.
Encapsulation of operations: Both the object structure and the operations that can be applied to individual objects are included in the type definitions.
Programming language compatibility: Both persistent and transient objects are handled seamlessly. Objects are made persistent by being reachable from a persistent collection (extent) or by explicit naming.
Type hierarchies and inheritance: Object types can be specified by using a type hierarchy, which allows the inheritance of both attributes and methods (operations) of previously defined types. Multiple inheritance is allowed in some models.
Extents: All persistent objects of a particular type can be stored in an extent. Extents corresponding to a type hierarchy have set/subset constraints enforced on their collections of persistent objects.
Polymorphism and operator overloading: Operations and method names can be overloaded to apply to different object types with different implementations.

In distributed databases, location transparency allows for database users, programmers and administrators to treat the data as if it is at one location. A SQL query with location transparency needs to specify fragments.

Statement(1) is incorrect because functional dependencies of relation R are not given, so we can't say whether the decomposition of R into R1 and R2 is lossless or not.

A semi-join returns one copy of each row in the first table for which at least one match is found. Semi-join is like EXCEPT command in SQL.

Write the steps required to scan - convert a circle using Bresenham’s algorithm.
Set the initial values of the variables: (h, k) = coordinates of circle center; x=0; y=circle radius r and d = 3 - 2r.
Test to determine whether the entire circle has been scan-converted. If x>y, stop.
Plot the eight points, found by symmetry with respect to the center (h, k), at the current (x, y) coordinates:
Plot(x+h, y+k) Plot(-x+h, -y+k)
Plot(y+h, x+k) Plot(-y+h, -x+k)
Plot(-y+h, x+k) Plot(y+h, -x+k)
Plot(-x+h, y+k) Plot(x+h, -y+k)
Compute the location of the next pixel. If d<0, then d=d+4x+6 and x=x+1. If d≥0, then d=d+4(x-y)+10, x=x+1 and y=y-1.
Go to step 2.

Rotation around a pivot point (2, 2) can be represented as:
(h, k) = (2, 2)