ISRO CS 2008

Question 1
Which of the following is an illegal array definition?
A
Type COLOGNE : (LIME, PINE, MUSK, MENTHOL); var a : array [COLOGNE] of REAL;
B
var a : array [REAL] of REAL;
C
var a : array [‘A’…’Z’] of REAL;
D
var a : array [BOOLEAN] of REAL;
       Data-Structures       Arrays
Question 1 Explanation: 
Array index should be integer not real numbers.
Expect the option B, All remaining indexes are not real numbers.
Option A , takes enum value as index which is integer number.
Option C, takes character which is having equivalent decimal value.
Option D, has boolean value as index whose value may be 0 or 1
Question 2
The term Phong associated with
A
Ray tracing
B
shading
C
Hidden line removal
D
a game
       Graphics       Phong
Question 2 Explanation: 
Phong shading is a per-fragment color computation. The vertex shader provides the normal and position data as out variables to the fragment shader. The fragment shader then interpolates these variables and computes the color
Question 3
The subnet mask 255.255.255.192
A
extends the network portion to 16 bits
B
extends the network portion to 26 bits
C
extends the network portion to 36 bits
D
has no effect on the network portion of an IP address
       Computer-Networks       IP-address
Question 3 Explanation: 
Default subnet mask for Class C is 255.255.255.192
(192)10 = (11000000)2
Since, 192 is written as 11000000, it has 2 sub-nets and remaining all hosts.
So, for first three octets, 24 bits are fixed and for last octet 2 bits are fixed, i.e. 24 + 2 = 26 bits
Question 4
On a LAN ,where are IP datagrams transported?
A
In the LAN header
B
In the application field
C
In the information field of the LAN frame
D
After the TCP header
       Computer-Networks       LAN
Question 4 Explanation: 
IP datagram is encapsulated in the payload field of Ethernet frame, so we can say that it is transported in information field of frame.
Question 5
In Ethernet, the source address field in the MAC frame is the _______ address.
A
original sender’s physical
B
previous station’s physical
C
next destination’s physical
D
original sender’s service port
       Computer-Networks       Ethernet
Question 5 Explanation: 
While the IP address of source and the destination in a datagram is kept same at each hop, the source MAC address is replaced at each station while the frame is in transit. So for the current station, the source address field will contain the MAC address of the previous station.
Question 6
Which of the following transmission media is not readily suitable to CSMA operation?
A
Radio
B
Optical fibers
C
Coaxial cable
D
Twisted pair
       Computer-Networks       CSMA
Question 6 Explanation: 
Wireless medium can’t be used for CSMA operations as they are not suitable for collision detection methods. As radio already have a large number of users, it can’t detect the collisions between the senders and the receivers.
Question 7
Consider the grammar
S → ABCc ∣ bc
BA → AB
Bb → bb
Ab → ab
Aa → aa
Which of the following sentences can be derived by this grammar?
A
abc
B
aab
C
abcc
D
abbc
       Theory-of-Computation       Context-Free-Language
Question 7 Explanation: 
C is useless in S→ABCc so remove it.
S→ABc
Now see each of remaining production
Bb→bb ( i.e. B→b)
Ab→ab (i.e.A→a)
Aa→aa (i.e. A→a)
So
S→ABc→abc
Question 8
The TCP sliding window
A
can be used to control the flow of information
B
always occurs when the field value is 0
C
always occurs when the field value is 1
D
occurs horizontally
       Computer-Networks       TCP/IP
Question 8 Explanation: 
TCP uses a Sliding Window mechanism for the flow control of data in transit on a network. In Sliding Window, the sending device can send all packets within the TCP window size without receiving an ACK.
The receiving device should acknowledge each packet it received and after receiving the ACK from the receiving device, the sending device slides the window to right side
Question 9
What is the bandwidth of the signal that ranges from 40 kHz to 4 MHz
A
36 MHz
B
360 kHz
C
3.96 MHz
D
396 kHz
       Computer-Networks       Transmission-and-Propagation-Delay
Question 9 Explanation: 
Let fh is the highest frequency and fi is the lowest frequency.
Bandwidth = fh – fi = 4000 - 40 KHz = 3960 KHz = 3.96 MHz
Question 10
Which Project 802 standard provides for a collision-free protocol?
A
802.2
B
802.3
C
802.5
D
802.6
       Computer-Networks       IEEE-802
Question 10 Explanation: 
→ Token ring is standardized with protocol IEEE 802.5. Token passing is the method of medium access, with only one token allowed to exist on the network at a time.
→ Network devices must acquire the token to transmit data, and may only transmit a single frame before releasing the token to the next station on the ring. When a station has data to transmit, it acquires the token at the earliest opportunity, marks it as busy, and attaches the data and control information to the token to create a data frame, which is then transmitted to the next station on the ring.
→ The frame will be relayed around the ring until it reaches the destination station, which reads the data, marks the frame as having been read, and sends it on around the ring. When the sender receives the acknowledged data frame, it generates a new token, marks it as being available for use, and sends it to the next station.
→ IEEE 802.2 is the logical link control (LLC) as the upper portion of the data link layer of the OSI Model.
→ IEEE 802.6 is a standard governed by the ANSI for Metropolitan Area Networks (MAN).
→ IEEE 802.3 is a working group and a collection of Institute of Electrical and Electronics Engineers (IEEE) standards produced by the working group defining the physical layer and data link layer media access control (MAC) of wired Ethernet.
Question 11
The Boolean theorem AB + A’C + BC = AB + A’C corresponds to
A
(A + B) ∙ (A’ + C) ∙ (B + C) = (A + B) ∙ (A’ + C)
B
AB + A’C + BC = AB + BC
C
AB + A’C + BC = (A + B) ∙ ( A ‘+ C) ∙ (B + C)
D
(A + B) ∙ (A’ + C) ∙ (B + C) = AB + A’C
       Digital-Logic-Design       Boolean-algebra
Question 11 Explanation: 
(X+Y)*(X+Z)*(Y+Z)=(X+Y)*(X+Z) Consensus Law
XY+XZ+YZ=XY+XZ Consensus Law

For min-term: AB + A'C +BC = AB + A'C
AND for max-term : ( A + B ).( A' + C ).( B + C ) = ( A + B ).(A' + C )
Question 12
In the given network of AND and OR gates, f can be written as
A
X0X1X2 … Xn + X1X2 … Xn + X2X3 … Xn + ⋯ + Xn
B
X0X1 + X2X3 + … Xn-1 Xn
C
X0 + X1 + X2 + … + Xn
D
X0X1 + X3 … Xn−1 + X2X3 + X5 … Xn−1 + ⋯ + Xn−2Xn−1 + Xn
E
None of the above
       Digital-Logic-Design       Boolean-algebra
Question 12 Explanation: 
(X0X1+X2)X3+X4)X5+⋯+XN
=(X0X1X3+X2X3+X4)X5+⋯+XN

=X0X1X3X5+X2X3X5+X4X5+⋯+XN

=X0X1X3X5⋯XN−1+X2X3X5⋯XN−1+X4X5X7⋯XN−1+⋯+XN
Question 13
If N2 = (7601)8 where N is a positive integer, then the value of N is
A
(241)5
B
(143)6
C
(165)7
D
(39)16
       Digital-Logic-Design       Number-system
Question 13 Explanation: 
N2 = (7601)8
N2 = 7*8*8*8 + 6*8*8 + 0 + 1*8
N2 = 3969
N = (63)10
Now, (241)5 = 2*5*5 + 4*5 + 1 = 71
Option (A) is incorrect.
(143)6 = 1*6*6 + 4*6 + 3 = 63
Option (B) is correct.
Question 14
Assume that each character code consists of 8 bits. The number of characters that can be transmitted per second through an asynchronous serial line at 2400 baud rate, and with two stop bits, is:
A
109
B
216
C
218
D
219
       Computer-Networks       Transmission-and-Propagation-Delay
Question 14 Explanation: 
Here, the baud value represents the serial port is capable of transferring a maximum number of bits per second.
Given 2400 baud value,
Sending maximum of 2400 bits per second with serial port .
Total Data To send = 1 bit(start) + 8 bits(char size) + 2 bits(Stop) = 11 bits.
Number of 8-bit characters that can be transmitted per second = 2400/11 = 218.18
The effective number of characters transmitted = 218 So, the correct option is (C).
Question 15
Four jobs to be executed on a single processor system arrive at time 0 in the order A, B, C, D . Their burst CPU time requirements are 4, 1, 8, 1 time units respectively. The completion time of A under round robin scheduling with time slice of one time unit is
A
10
B
4
C
8
D
9
       Operating-Systems       CPU-scheduling
Question 15 Explanation: 
1. All processes are arrived at time 0.
2. Algorithm used for scheduling is round robin with time quantum of one unit time.
3. The order of execution of the processes A B C D A C A C A,C,C,C,C,C
4. After 8 context switches, process A completes it execution So the completion time is 9
Question 16
Which one of the following algorithm design techniques is used in finding all pairs of shortest distances in a graph?
A
Dynamic programming
B
Backtracking
C
Greedy
D
Divide and Conquer
       Algorithms       Algorithm-Paradigms
Question 16 Explanation: 
→ The Floyd-Warshall algorithm is an algorithm for finding shortest paths in a weighted graph with positive or negative edge weights (but with no negative cycles).
→ A single execution of the algorithm will find the lengths (summed weights) of shortest paths between all pairs of vertices
→ The Floyd-Warshall algorithm is an example of dynamic programming.
Question 17
The address space of 8086 CPU is
A
one Megabyte
B
256 Kilobytes
C
1 K Megabytes
D
64 Kilobytes
       Computer-Organization       Microprocessor
Question 17 Explanation: 
In 8086 architecture there are 16 bit data lines and 20 bit address lines.
16 bit data lines means that the word size must be 2 bytes and these 2 bytes can be read in a single memory cycle.
20 bit address lines corresponds that the memory size is 220 Bytes = 1 Megabyte
Question 18
The performance of a pipelined processor suffers if
A
the pipeline stages have different delays
B
consecutive instructions are dependent on each other
C
the pipeline stages share hardware resources
D
All of the above
       Computer-Organization       Pipelining
Question 18 Explanation: 
1. Pipelining is one way of improving the overall processing performance of a processor.
2. This architectural approach allows the simultaneous execution of several instructions.
3. Pipelining is transparent to the programmer; it exploits parallelism at the instruction level by overlapping the execution process of instructions.
4. It is analogous to an assembly line where workers perform a specific task and pass the partially completed product to the next worker.
Question 19
If (12x)3 = (123)x then the value of x is
A
3
B
3 or 4
C
2
D
None of these
       Digital-Logic-Design       Number-system
Question 19 Explanation: 
Given, (12x)3 = (123)x
Since LHS has 3 as the base and RHS has ‘x’ base,
1 * 3*3 + 2 * 3 + x * 1 = 1 * x*x + 2 * x + 3
9 + 6 + x = x2 + 2x + 3
x2 + x - 12 = 0
x2 + 4x - 3x - 12 = 0
x( x + 4 ) - 3(x + 4) = 0
(x + 4)(x - 3) = 0
x = 3 and -4
But, both the values are infeasible.

Alternative explanation :
According to the rules of number systems , the numbers present in a number system should not be greater than the base of the number system.
According to LHS , (12x)3 tells us that the value of x should be less than 3.
According to RHS , (123)x tells us that the value of x should be greater than 3 as largest digit in 123 is 3.
Therefore, any combination is not possible.
Question 20
The advantage of MOS devices over bipolar devices is that
A
it allows higher bit densities and also cost effective
B
it is easy to fabricate
C
it is higher-impedance and operational speed
D
all of these
       Integrated-Circuits       MOS
Question 20 Explanation: 
Explanation:
→ The Mosfet has a much better response in high frequency than the BJT.
→ Normally the switching speed would be in the us range for the BJT while the Mosfet is in the ns range.
→ The advantage of the Mosfet is also in the circuitry needed to operate it. The BJT is a current driven device while the Mosfet is voltage driven. The circuitry for creating voltage pulses is much simpler than the ones for current pulses and the first ones require less power
Question 21
More than one word are put in one cache block to
A
exploit the temporal locality of reference in a program
B
exploit the spatial locality of reference in a program
C
reduce the miss penalty
D
none of these
       Computer-Organization       Cache
Question 21 Explanation: 
Temporal locality refers to the reuse of specific data and/or resources within relatively small time durations. Spatial locality refers to the use of data elements within relatively close storage locations.
To exploit the spatial locality, more than one word are put into cache block.
Question 22
A computer uses 8 digit mantissa and 2 digit exponent. If a = 0.052 and b = 28E + 11 then b + a – b will
A
result in an overflow error
B
result in an underflow error
C
be 0
D
be 5.28 E + 11
       Digital-Logic-Design       Number-system
Question 22 Explanation: 

The computer uses 8 digit mantissa and 2 digit exponent:

a = 0.052 We can represent the number in M*E So a= 0.052 = 0.52*10-1

mantissa = 0.52, exponent = −1.

b = 28E+11, We can represent the number in M*E So b = 28E+11= 0.28*1013

mantissa = 0.28, exponent = 13.

To add b+a, Small exponent number, a is shifted

to 13-(-1) = 14 places to right side

a = 0.0000000000000052E+13

From the given data computer uses only 8 digit mantissa, so digits beyond 8th position will be discarded.

So a = 0.00000000E+13 = 0.0 E+13

b + a = (0.28E + 13) + (0.0E + 13 )

= 0.28E + 13

Then b + a - b = (0.28E + 13) - (0.28E + 13)

= 0
Question 23
The Boolean expression ( A + C’)(B’+ C’) simplifies to
A
C’ + AB’
B
C’ (A’ + B)
C
B’C’ + AB’
D
None of these.
       Digital-Logic-Design       Boolean-algebra
Question 23 Explanation: 

The following expression can be simplified as:

(A + C')(B'+ C')

= AB' + AC' + B'C' + C
'
= AB' + C'(A + B' + 1) // 1 + A = 1

= AB' + C'
Question 24
In the expression A'(A’ + B’) by writing the first term A as A + 0, the expression is best simplified as
A
A + AB
B
AB
C
A'
D
A + B
       Digital-Logic-Design       Boolean-Algebra
Question 24 Explanation: 

A'(A’ + B’)

This expression can be simplified as:

= A'A' + A'B'

= A' + A'B'

= A'(1 + B') // 1 + B' = 1

= A'
Question 25
The logic operations of two combinational circuits in Figure-I and Figure-II are
A
entirely different
B
identical
C
complementary
D
dual
       Digital-Logic-Design       Sequential-Circuits
Question 25 Explanation: 

The Two functions are entirely different as:

Figure 1: The logic gates derive the following function:

F1 = ((X + Y')' + X)'

= ((X + Y')')'. X'

= (X + Y'). X'

= XX' + X'Y'

= X'Y'

Figure 2: It is simple AND gate which has 1 input already complimented.

F2 = XY'

So, these two functions are entirely different.
Question 26
The output Y of the given circuit
A
1
B
0
C
X
D
X’
       Digital-Logic-Design       Sequential-Circuits
Question 26 Explanation: 
The above function is implemented using XOR function, and gives output as 1 only when both the inputs are different. In this function, both the inputs of the first XOR gate are set to 0. Then the output is also 0 and the further two gates are also getting 0 as both their inputs. So, the final output Y is 0.
Question 27
Which of the following is not a valid rule of XOR?
A
0 XOR 0 = 0
B
1 XOR 1 = 1
C
1 XOR 0 = 1
D
B XOR B = 0
       Digital-Logic-Design       Boolean-Algebra
Question 27 Explanation: 

XOR gate only returns 1 as the output when both inputs are different and in every other case, it returns 0.

So, options (A), (C) and (D) are correct.
Question 28
The number of distinct simple graphs with up to three nodes is
A
15
B
10
C
7
D
9
       Data-Structures       Graphs
Question 28 Explanation: 

The number of distinct simple graphs with up to three nodes:



So, total 7 unlabeled nodes are possible. Option (C) is correct.
Question 29
The maximum number of edges in a n-node undirected graph without self loops is
A
n2
B
n * (n-1)/2
C
n – 1
D
(n + 1) * n/2
       Data-Structures       Graphs
Question 29 Explanation: 
A complete graph can have a maximum edges for ‘n’ nodes as each node is connected to every other node. So, for n nodes, maximum n * (n-1)/2 nodes are possible.
Question 30
The network 198.78.41.0 is a
A
Class A network
B
Class B network
C
Class C network
D
Class D network
       Computer-Networks       Subnetting
Question 30 Explanation: 

In classful addressing, The range of first octet should be between one of the following:

CLASS A- 0 to 127

CLASS B – 128 to 191

CLASS C – 192 to 223

CLASS D- 224 to 239

CLASS E- 240 to 255

Given IP address = 198.78.41.0

So, it is a class C address.
Question 31
The join operation can be defined as
A
a cartesian product of two relations followed by a selection
B
a cartesian product of two relations
C
a union of two relations followed by cartesian product of the two relations
D
a union of two relations
       Database-Management-System       Relational-Algebra
Question 31 Explanation: 

→ The join operation can be defined as a cartesian product of two relations followed by a selection.

→ A SQL JOIN clause is used to combine rows from two or more tables, based on a related column between them.

Different Types of SQL JOINs

1. INNER JOIN: Returns records that have matching values in both tables



2. LEFT (OUTER) JOIN: Return all records from the left table, and the matched records from the right table



3. RIGHT (OUTER) JOIN: Return all records from the right table, and the matched records from the left table



4. FULL (OUTER) JOIN: Return all records when there is a match in either left or right table


Question 32
If a square matrix A satisfies AAT = I, then the matrix, A is
A
Idempotent
B
Symmetric
C
Orthogonal
D
Hermitian
       Engineering-Mathematics       Linear-algebra
Question 32 Explanation: 

A square matrix A is an orthogonal matrix if its transpose is equal to its inverse. An orthogonal matrix A is necessarily invertible and unitary.

Conditions for an orthogonal matrix:

AT= A-1 and

A AT = AT A = I,

where I is an Identity matrix
Question 33
Embedded pointer provides
A
A secondary access path
B
A physical record key
C
An inverted index
D
A primary key
       Data-Structures       Relational-databases
Question 33 Explanation: 

1. To understand how pointers and their associated data elements are allocated in Microsoft RPC, you have to differentiate between top-level pointers and embedded pointers

2. Top-level pointers are those that are specified as the names of parameters in function prototypes. Top-level pointers and their referents are always allocated on the server.

3. Embedded pointers are pointers that are embedded in data structures such as arrays, structures, and unions. When embedded pointers only write output to a buffer and are null on input, the server application can change their values to non-null. In this case, the client stubs allocate new memory for this data.

4. If the embedded pointer is not null on the client before the call, the stubs do not allocate memory on the client on return. Instead, the stubs attempt to write the memory associated with the embedded pointer into the existing memory on the client associated with that pointer, overwriting the data already there.
Question 34
An interrupt in which the external device supplies its address as well as the interrupt requests is known as
A
vectored interrupt
B
maskable interrupt
C
non-maskable interrupt
D
designated interrupt
       Computer-Organization       Interrupt
Question 34 Explanation: 

→ A vectored interrupt is a processing technique in which the interrupting device directs the processor to the appropriate interrupt service routine.

→ A non-maskable interrupt (NMI) is a hardware interrupt that standard interrupt-masking techniques in the system cannot ignore. It typically occurs to signal attention for non-recoverable hardware errors.

→ Maskable Interrupts - Those interrupts whose request can be denied by microprocessor. eg- RST 1, RST2, RST 5, RST 6.5 etc.
Question 35
Relative to the program translated by a compiler, the same program when interpreted runs
A
Faster
B
Slower
C
At the same speed
D
May be faster or slower
       Compiler-Design       Compilers
Question 35 Explanation: 

→ Interpreter translates program one statement at a time. Scans the entire program and translates it as a whole into machine code. It takes less amount of time to analyze the source code but the overall execution time is slower.

→ Compiler scans the entire program and translates it as a whole into machine code. It takes large amount of time to analyze the source code but the overall execution time is comparatively faster.
Question 36
Consider the following Assembly language program
MVIA   30 H
ACI 30 H
XRA A
POP H
After the execution of the above program, the contents of the accumulator will
A
30 H
B
60 H
C
00 H
D
contents of stack
       Computer-Organization       8085-microprocessor
Question 36 Explanation: 

MVI (move immediate) instruction is to be used when directly adding a hexadecimal value MVI A, 30H means the data 30H will be moved to A register.



ACI: – Add immediate to accumulator with carry.

XRA: – Exclusive OR register or memory with the accumulator

So after first instruction execution, Accumulator value will be A = 30H = 0011 0000

After second Instruction A = 30 + 30 = 0110 0000

After third Instruction A = A⊕A = 0110 0000 ⊕ 0110 0000 = 0000 0000 = 00H
Question 37
Consider the following C function:
int f(int n)
{
static int i = 1;
if(n >= 5) return n;
n = n+i;
i++;
return f(n);
}
The value returned by f(1) is
A
5
B
6
C
7
D
8
       Programming-for-Output-Problems       Programming
Question 37 Explanation: 
The variable “i” is static variable and the value of that variable will be retained between multiple function calls.
first line of f() is executed only once.
Depending upon the value “n” and “i”, the function f() will until n>=5.
You can find the tracing of function f() from the below Execution of f(1)
i = 1
n = 2
i = 2
Call f(2)
i = 2
n = 4
i = 3
Call f(4)
i = 3
n = 7
i = 4
Call f(7)
since n >= 5 return n(7) with return value = 7
Question 38
In a resident – OS computer, which of the following systems must reside in the main memory under all situations?
A
Assembler
B
Linker
C
Loader
D
Compiler
       Operating-Systems       Linker-loader
Question 38 Explanation: 
Loader is the part of an operating system that is responsible for loading programs and libraries. It is one of the essential stages in the process of starting a program, as it places programs into memory and prepares them for execution.
Loading a program involves tasks such as reading the contents of the executable file containing the program instructions into memory, and then carrying out other required preparatory tasks to prepare the executable for running.
The operating system starts the program by passing control to the loaded program code once the loading process is completed.
Question 39
Which of the following architecture is/are not suitable for realising SIMD?
A
Vector processor
B
Array processor
C
Von Neumann
D
All of the above
       Computer-Organization       SIMD
Question 39 Explanation: 
→ Single instruction, multiple data (SIMD) is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data points simultaneously. Such machines exploit data level parallelism, but not concurrency: there are simultaneous (parallel) computations, but only a single process (instruction) at a given moment
→ The von Neumann architecture is also known as the von Neumann model or Princeton architecture consists of the following components:
A processing unit that contains an arithmetic logic unit and processor registers
A control unit that contains an instruction register and program counter
Memory that stores data and instructions
External mass storage
Input and output mechanisms
Question 40
Consider the following code segment
for (int k=0; k<20; k=k+2)
{
if (k % 3 == 1)
system.out.print(k+ " ")
}
What is printed as a result of executing the code segment?
A
4 16
B
4 10 16
C
0 6 12 18
D
1 4 7 10 13 16 19
       Programming-for-Output-Problems       Programming
Question 40 Explanation: 
for loop starts from 0 to 20 and increments with 2 at each iteration.
k = 0 % 3 = 0
k = 2 % 3 = 2
k = 4 % 3 = 1 // prints 4
k = 6 % 3 = 0
k = 8 % 3 = 2
k = 10 % 3 = 1 // prints 10
k = 12 % 3 = 0
k = 14 % 3 = 2
k = 16 % 3 = 1 // prints 16
k = 18 % 3 = 0
So, Output is 4 10 16
Question 41
The device which is used to connect a peripheral to bus is known as
A
control register
B
interface
C
communication protocol
D
none of these
       Computer-Organization       Periperals
Question 41 Explanation: 
1. A control register is a processor register which changes or controls the general behavior of a CPU or other digital device. Common tasks performed by control registers include interrupt control, switching the addressing mode, paging control, and coprocessor control.
2. Interface is the device which is used to connect a peripheral to bus.
3. In telecommunication, a communication protocol is a system of rules that allow two or more entities of a communications system to transmit information via any kind of variation of a physical quantity. The protocol defines the rules, syntax, semantics and synchronization of communication and possible error recovery methods. Protocols may be implemented by hardware, software, or a combination of both.
Question 42
The TRAP is one of the interrupts available in INTEL 8085. Which one of the following statements is true of TRAP ?
A
it is level triggered
B
it is negative edge triggered
C
it is +ve edge triggered
D
it is both +ve and -ve edges triggered
       Computer-Organization       8085-Microprocessor
Question 42 Explanation: 
The TRAP interrupt is edge and level sensitive. Hence, to initiate TRAP, the interrupt signal has to make a low to high transition and then it has to remain high until the interrupt is recognized.
Question 43
Raid configurations of the disks are used to provide
A
Fault-tolerance
B
High speed
C
High data density
D
A & B
       Operating-Systems       RAID
Question 43 Explanation: 
RAID stands for Redundant Array of Independent Disks. A RAID-enabled system uses two or more hard disks to improve the performance and provide some level of fault tolerance for a machine.
Question 44
Which of the following need not necessarily be saved on a context switch between processes?
A
General purpose registers
B
Translation lookaside buffer
C
Program counter
D
All of the above
       Operating-Systems       Contextswitch
Question 44 Explanation: 

The values stored in registers, stack pointers and program counters are saved on context switch between the processes so as to resume the execution of the process.

There’s no need of saving the contents of TLB as it is invalidated after each context switch.
Question 45
Which of the following is termed as minimum error code
A
Binary code
B
Gray code
C
Excess 3 code
D
Octal code
       Digital-Logic-Design       Number-system
Question 45 Explanation: 

Gray codes are less error-prone for mechanical devices that involve making and breaking electrical circuits because they only change in one bit position at a time.

So, they are considered as the minimum error code.
Question 46
The total time to prepare a disk drive mechanism for a block of data to be read from it is
A
seek time
B
latency
C
latency plus seek time
D
transmission time
       Operating-Systems       Disk-scheduling
Question 46 Explanation: 
Seek time is the time taken by the head to move to the correct track and Rotational latency is the time taken by the disk to rotate until the head is over the desired block to read
So, the total time to prepare a disk drive mechanism for a block of data to be read from is the sum of both the seek time and the latency.
Question 47
Feedback queues
A
are very simple to implement
B
dispatch tasks according to execution characteristics
C
are used to favour real time tasks
D
require manual intervention to implement properly
       Operating-Systems       CPU-scheduling
Question 47 Explanation: 
Consider feedback queue as multilevel feedback queue. Multilevel feedback queue scheduling allows a process to move between queues. This movement is facilitated by the characteristic of the CPU burst of the process. If a process uses too much CPU time, it will be moved to a lower-priority queue.
Question 48
With Round-Robin CPU scheduling in a time shared system
A
using very large time slices (quantas) degenerates into First Come First served (FCFS) algorithm.
B
using extremely small time slices improves performance
C
using very small time slices degenerates into Last-In First-Out (LIFO) algorithm.
D
using medium sized times slices leads to shortest Request time First (SRTF) algorithm
       Operating-Systems       CPU-Scheduling
Question 48 Explanation: 
If time quantum is very large, then scheduling happens according to FCFS
Question 49
Dynamic address translation
A
is part of the operating system paging algorithm
B
is useless when swapping is used
C
is the hardware necessary to implement paging
D
storage pages at a specific location on disk
       Operating-Systems
Question 49 Explanation: 
Dynamic address translation is the hardware necessary to implement paging as it converts the logical address to physical address
Question 50
Thrashing
A
always occurs on large computers
B
is a natural consequence of virtual memory systems
C
can always be avoided by swapping
D
can be caused by poor paging algorithms
       Operating-Systems       Thrashing
Question 50 Explanation: 
When the degree of multiprogramming increases, the CPU utilization will drastically fall down and the system will spent more time only in the page replacement and the time taken to complete the execution of the process will increase. This situation in the system is called as thrashing. It can also be a consequence of poor programming algorithms.
Question 51
What is the name of the operating system that reads and reacts in terms of operating system?Dynamic address translation
A
Batch system
B
Quick response time
C
real time system
D
Time sharing system
       Operating-Systems       CPU-Scheduling
Question 51 Explanation: 
A real-time operating system is an operating system that guarantees to process events or data by a specific moment in time.
Question 52
The Memory Address Register
A
is a hardware memory device which denotes the location of the current instruction being executed.
B
is a group of electrical circuit, that performs the intent of instructions fetched from memory
C
contains the address of the memory location that is to be read from or stored into
D
contains a copy of the designated memory location specified by the MAR after a “read” or the new contents of the memory prior to a “write”
       Computer-Organization       Registers
Question 52 Explanation: 
In a computer, the Memory Address Register (MAR) is the CPU register that either stores the memory address from which data will be fetched from the CPU, or the address to which data will be sent and stored.
Question 53
Which of the following is an example of spooled device?
A
A line printer used to print the output of a number of jobs
B
A terminal used to enter input data to a running program
C
A secondary storage device in a virtual memory system
D
A graphic display device
       Operating-Systems       Spooled-device
Question 53 Explanation: 
Spooling works like a typical request queue where data, instructions and processes from multiple sources are accumulated for execution later on. Generally, it is maintained on computer’s physical memory, buffers or the I/O device-specific interrupts. The spool is processed in FIFO manner i.e. whatever first instruction is there in the queue will be popped and executed.
Example: printer
Question 54
Checkpointing a job
A
allows it to be completed successfully
B
allows it to continue executing later
C
prepares it for finishing
D
occurs only when there is an error in it
       Operating-Systems       Check-point
Question 54 Explanation: 
Checkpointing is a method of periodically saving the state of a job so that, if for some reason, the job does not complete, it can be restarted from the saved state.
Question 55
A public key encryption system
A
allows anyone to decode the transmissions
B
allows only the correct sender to decode the data
C
allows only the correct receiver to decode the data
D
does not encode the data before transmitting it
       Computer-Networks       Encryption-Decryption
Question 55 Explanation: 
Public-key encryption is a cryptographic system that uses two keys, a public key known to everyone and a private or secret key known only to the recipient of the message.
A receiver can decode the message using his own private key and the public key of the sender.
Question 56
Overlaying
A
requires use of a loader
B
allows larger programs, but requires more effort
C
is most used on large computers
D
is transparent to the user
E
A,B and D
       Operating-Systems       Overlying
Question 56 Explanation: 
Overlaying means "the process of transferring a block of program code or other data into internal memory, replacing what is already stored".Overlaying is a programming method that allows programs to be larger than the computer's main memory.overlaying is transparent to the user.
Question 57
A critical section is a program segment
A
which should run in a certain amount of time
B
which avoids deadlocks
C
where shared resources are accessed
D
which must be enclosed by a pair of semaphore operations P and V
       Operating-Systems       Critical-section
Question 57 Explanation: 
In concurrent programming, concurrent accesses to shared resources can lead to unexpected or erroneous behavior, so parts of the program where the shared resource is accessed are protected. This protected section is the critical section .
Question 58
In which of the following four necessary conditions for deadlock processes claim exclusive control of the resources they require?
A
no preemption
B
mutual exclusion
C
circular wait
D
hold and wait
       Operating-Systems       Deadlock
Question 58 Explanation: 
Mutual Exclusion is a condition when one or more than one resource are non-sharable (Only one process can use at a time) i.e. processes claim exclusive control of the resources they require.
Question 59
Fork is
A
the creation of a new job
B
the dispatching of a task
C
increasing the priority of a task
D
the creation of a new process
       Operating-Systems       Process-Threads
Question 59 Explanation: 
fork() creates a new process by duplicating the calling process, The new process, referred to as child, is an exact duplicate of the calling process, referred to as parent, except for the following :
The child has its own unique process ID, and this PID does not match the ID of any existing process group.
The child’s parent process ID is the same as the parent process ID.
The child does not inherit its parent’s memory locks and semaphore
adjustments.
The child does not inherit outstanding asynchronous I/O operations from its parent nor does it inherit any asynchronous I/O contexts from its parent.
Question 60
Which of the following need not necessarily be saved on a Context Switch between processes?
A
General purpose registers
B
Translation lookaside buffer
C
Program counter
D
Stack pointer
       Operating-Systems       Context-switch
Question 60 Explanation: 
The values stored in registers, stack pointers and program counters are saved on context switch between the processes so as to resume the execution of the process.
There’s no need of saving the contents of TLB as it is invalidated after each context switch.
Question 61
Consider a logical address space of 8 pages of 1024 words mapped into memory of 32 frames. How many bits are there in the logical address?
A
13 bits
B
15 bits
C
14 bits
D
12 bits
       Operating-Systems       Memory-management
Question 61 Explanation: 
logical address space = 8 pages of 1024 words
number of bits in logical address space = p (page bits) + d (offset bits)
number of bits = log28 + log21024 = 3 + 10 = 13 bits
Question 62
The performance of Round Robin algorithm depends heavily on
A
size of the process
B
the I/O bursts of the process
C
the CPU bursts of the process
D
the size of the time quantum
       Operating-Systems       CPU-scheduling
Question 62 Explanation: 
In Round Robin algorithm, it is very important to choose the the quantum carefully as smaller time quanta leads to more context switches thereby reducing the efficiency of the CPU and the larger time quanta makes the round robin algorithm regenerate into FCFS algorithm.
Question 63
The performance of Round Robin algorithm depends heavily on
A
size of the process
B
the I/O bursts of the process
C
the CPU bursts of the process
D
the size of the time quantum
       Operating-Systems       CPU-scheduling
Question 63 Explanation: 
In Round Robin algorithm, it is very important to choose the the quantum carefully as smaller time quanta leads to more context switches thereby reducing the efficiency of the CPU and the larger time quanta makes the round robin algorithm regenerate into FCFS algorithm.
Question 64
The page replacement algorithm which gives the lowest page fault rate is
A
LRU
B
FIFO
C
Optimal page replacement
D
Second chance algorithm
       Operating-Systems       Page-Replacement-algorithm
Question 64 Explanation: 
In Optimal Page replacement algorithm, pages are replaced which are not used for the longest duration of time in the future. This page replacement algorithm ensures the lowest page fault rate.
Question 65
Which of the following class of statement usually produces no executable code when compiled?
A
declaration
B
assignment statements
C
input and output statements
D
structural statements
       Compiler-Design       Code-Optimization
Question 65 Explanation: 

Each statement is classified as executable or non-executable.

Executable Statements

1.Arithmetic, logical, statement label (ASSIGN), and character assignment statements

2.Unconditional GO TO, assigned GO TO, and computed GO TO statements

3.Arithmetic IF and logical IF statements

4.Block IF, ELSE IF, ELSE, and END IF statements

5.CONTINUE statement

6.STOP and PAUSE statements

7.DO statement

8.READ, WRITE, and PRINT statements

9.REWIND, BACKSPACE, ENDFILE, OPEN, CLOSE, and INQUIRE statements

10.CALL and RETURN statements

11.END statement

Non-executable Statements

1.PROGRAM, FUNCTION, SUBROUTINE, ENTRY, and BLOCK DATA statements

2.DIMENSION, COMMON, EQUIVALENCE, IMPLICIT, PARAMETER, EXTERNAL, INTRINSIC, and SAVE statements

3.INTEGER, REAL, DOUBLE PRECISION, COMPLEX, LOGICAL, and CHARACTER type-statements

4.DATA statement

5.FORMAT statement

6.Statement function statement
Question 66
What is the value of F(4) using the following procedure:
function F(K : integer)
integer;
begin
if (k<3) then F:=k
else F:=F(k-1)*F(k-2)+F(k-3)
end;
A
5
B
6
C
7
D
8
       Data-Structures       Programming
Question 66 Explanation: 

F(4) = F(3)*F(2)+F(1) = 5

F(3) = F(2)*F(1)+F(0) = 2

F(2) = 2

F(1) = 1

F(0) = 0
Question 67
Stack A has the entries a, b, c (with a on top). Stack B is empty. An entry popped out of stack A can be printed immediately or pushed to stack B. An entry popped out of the stack B can be only be printed. In this arrangement, which of the following permutations of a, b, c are not possible?
A
b a c
B
b c a
C
c a b
D
a b c
       Data-Structures       Stacks-queues
Question 67 Explanation: 
Explanation:
Option (A):
Pop a from stack A
Push a to stack B
Print b
Print a from stack B
Print c from stack A
Order = b a c
Option (B):
Pop a from stack A
Push a to stack B
Print b from stack A
Print c from stack A
Print a from stack A
Order = b c a
Option (C):
Pop a from stack A
Push a to stack B
Pop b from stack A
Push b to stack B
Print c from stack A
Now, printing a will not be possible.
Question 68
The time required to search an element in a linked list of length n is
A
O(log n)
B
O(n)
C
O(1)
D
(n2)
       Data-Structures       Searching
Question 68 Explanation: 
In the worst case, the element to be searched has to be compared with all elements of linked list. It will take O(n) time to search the element.
Question 69
Which of the following operations is performed more efficiently by doubly linked list than by linear linked list?
A
Deleting a node whose location is given
B
Searching an unsorted list for a given item
C
Inserting a node after the node with a given location
D
Traversing the list to process each node
       Data-Structures       Linked-list
Question 69 Explanation: 
Searching node / traversing the list means we need to traverse the entire list whether it may be linear linked list or doubly linked list.
Inserting the node after the node with the a given location won’t require of traversing the list to previous nodes or memory locations.In this case also, there is no difference between whether it may be linear linked list or doubly linked list.

The main purpose of double linked list is to traverse the list in both directions so Deleting the node becomes easy while traversing the both directions.
Question 70
The time required to search an element in a linked list of length n is
A
O(log n)
B
O(n)
C
O(1)
D
O(n2)
       Data-Structures       Searching
Question 70 Explanation: 
In the worst case, the element to be searched has to be compared with all elements of linked list, so the time complexity is O(n)
Question 71
We can make a class abstract by
A
Declaring it abstract using the virtual keyword
B
Making at least one member function as virtual function
C
Making at least one member function as pure virtual function
D
Making all member function const
       Java       Member-function
Question 71 Explanation: 
An abstract class is a class that is designed to be specifically used as a base class. An abstract class contains at least one pure virtual function. A pure virtual function can be declared by using a pure specifier ( = 0 ) in the declaration of a virtual member function in the class declaration.
Question 72
A Steiner patch is
A
Biquadratic Bezier patch
B
Bicubic patch
C
Circular patch only
D
Bilinear Bezier patch
       Graphics       Steiner
Question 72 Explanation: 
Steiner patches are triangular surface patches for which the Cartesian coordinates of points on the patch are defined parametrically by quadratic polynomial functions of two variables. So these surfaces are formed from biquadratic Bezier patches.
Question 73
A complete binary tree with the property that the value at each node is as least as large as the values at its children is known as
A
binary search tree
B
AVL tree
C
completely balanced tree
D
Heap
       Data-Structures       Binary-trees
Question 73 Explanation: 
In a Max. Binary Heap, the key value at each node is as least as large as the values at its children. Similarly in Min Binary Heap, the key at root must be minimum among all keys present in Binary Heap.
Question 74
The minimum number of fields with each node of doubly linked list is
A
1
B
2
C
3
D
4
       Data-Structures       Linked-list
Question 74 Explanation: 
Explanation: In general, each node of doubly link list always has 3 fields, i.e., the previous node pointer, the data field, and the next node pointerSo, answer should be option (C) 3.
However, each node of doubly linked list can have only 2 fields, i.e., XOR pointer field, and data field. This XOR pointer field can points both previous node and next node, this is the best case with data field. This is called as memory efficient
doubly linked list, Also, if we remove data node from the XOR linked list, then each node of this doubly linked list can have only 1 field, i.e., XOR pointer field. But, this is without data field so, this doubly linked list does not make sense.
Question 75
How many comparisons are needed to sort an array of length 5 if a straight selection sort is used and array is already in the opposite order?
A
1
B
5
C
10
D
20
       Algorithms       Sorting
Question 75 Explanation: 
Consider the array: 5 4 3 2 1
1st iteration will compare 4 numbers with the 5
2nd iteration will compare 3 numbers with the 4
3rd iteration will compare 2 numbers with the 3
4th iteration i will compare 1 number with the 2
So, the total number of comparisons is 4 + 3 + 2 + 1 = 10
It can be viewed as the sum of the sequence of the first (n-1) numbers starting by 1
S = ((1 + (n-1) )*(n-1) )/2
S = 10
Question 76
Consider the graph shown in the figure below: Which of the following is a valid strong component?
A
a, c, d
B
a, b, d
C
b, c, d
D
a, b, c
       Engineering-Mathematics       Graph-Theory
Question 76 Explanation: 
A directed graph is strongly connected if there is a path between all pairs of vertices. A strongly connected component (SCC) of a directed graph is a maximal strongly connected subgraph.
The graph has (a, b, c) as a strongly connected component.
Question 77
Repeated execution of simple computation may cause compounding of
A
round-off errors
B
syntax errors
C
run-time errors
D
logic errors
       Digital-Logic-Design       Compilers-and-Parsers
Question 77 Explanation: 
→A syntax error in computer science is an error in the syntax of a coding or programming language, entered by a programmer. Syntax errors are caught by a software program called a compiler, and the programmer must fix them before the program is compiled and then run
→A runtime error is a program error that occurs while the program is running.
→A logic error is a bug in a program that causes it to operate incorrectly, but not to terminate abnormally (or crash). A logic error produces unintended or undesired output or other behaviour, although it may not immediately be recognized.
→Roundoff error is the difference between an approximation of a number used in computation and its exact (correct) value. In certain types of computation, roundoff error can be magnified as any initial errors are carried through one or more intermediate steps and repeated execution.
Question 78
In C, what is the effect of a negative number in a field width specifier?
A
the values are displayed right justified
B
the values are displayed centered
C
the values are displayed left justified
D
the values are displayed as negative numbers
       C-Language       Programming
Question 78 Explanation: 
To left justify, use a negative number in the field width:
Controlling integer width with printf
The %3d specifier is used with integers, and means a minimum width of three spaces, which, by default, will be right-justified:

Left-justifying printf integer output
To left-justify integer output with printf, just add a minus sign ( - ) after the % symbol, like this:

The printf integer zero-fill option
To zero-fill your printf integer output, just add a zero (0) after the % symbol, like this:
Question 79
If the two matrices have the same determinant, then the value of x is
A
1/2
B
√2
C
± 1/2
D
± 1/√2
       Engineering-Mathematics       Linear-algebra
Question 79 Explanation: 
Determinant of 1st Matrix = X2 – 1
Determinant of 2nd Matrix = X2– X
Since the determinants are equal:
X2 - 1 = X2 - 1.
X2 + X - 1 = 0
X = 1/2
Option (A) is correct
Question 80
How many 2-input multiplexers are required to construct a 2<sup>10<sup>-input multiplexer?
A
1023
B
31
C
10
D
127
       Digital-Logic-Design       Multiplexer
Question 80 Explanation: 

210 x1 MUX has 210 inputs.
Level-1 has 29 (=512) 2x1 multiplexers which take 2*29 = 210 inputs and produces 512 outputs.
Similarly,
Level-2 has 256 MUX.
Level-3 has 128 MUX.
Level-4 has 64 MUX.
Level-5 has 32 MUX.
Level-6 has 16 MUX.
Level-7 has 8 MUX.
Level-8 has 4 MUX.
Level-9 has 2 MUX.
Level-10 has 1 MUX.
Total number of Multiplexers= 512+256+128+64+32+16+8+4+2+1
=1023
There are 80 questions to complete.
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