→ ​ De Morgan’s Laws:
(i). (A ​ V ​ B)’ = A' ​ ∧ ​ B'
(ii). (A ​ ∧ ​ B)’ = A' ​ V ​ B'
→ ​ Identity Law​ :
(i). 1 AND A = A
(ii). 0 OR A = A
→ ​ Complement law:
(i). A AND A'=1
(ii). A OR A'=0
→ ​ Idempotent law:
The idempotence in the context of elements of algebras that remain invariant when raised to a positive integer power, and literally means "(the quality of having) the same power", from idem + potence (same + power).
(i). A V A=A
(ii). A ∧ A=A
According to boolean algebra

Given data,
f(x)=x+1
g(x)=x+3
Constraint is f0 f0 f0 f
Step-1: We can write into fo fo fo f is f(f(f(x+1)))
We can write into f(f(x+2)) and f(x+3).
Step-2: Above constraint is equal to "x+4" because f(x+3)+1
Step-3: We can also write into fog(x)=x+4 and gof(x)=x+4.
So, g+1 is appropriate answer.

The context free languages are closed under union and kleene star but it is not closed under intersection and complementation.
Note: Except intersection and complementation will closed under all operations in CFL.

Every graph is following basic 2 properties:
1. Sum of degrees of the vertices of a graph should be even.
2. Sum of degrees of the vertices of a graph is equal to twice the number of edges.
Statement-(i) is violating property-1.
= 1+2+3+4+5
= 15 is odd number.
Statement-(ii) is violating property-1.
= 3+4+5+6+7
= 25 is odd number.
Statement-(iii) is violating property-1.
= 1+4+5+8+6
= 24 is even number
Statement-(iv) is violating property-1
= 3+4+5+6
= 18 is even number

Option-A: 1100 convert into 2’s complement is
1100
1’s complement: 0011
2’s complement: 1
--------
0100
Option-B: 1001 convert into 2’s complement is
1001
1’s complement: 0110
2’s complement:
1
--------
0111
---------
Option-C: 1000 convert into 2’s complement is
1000
1’s complement: 0111
2’s complement:
1
--------
1000
---------
Option-D: 1111 convert into 2’s complement is
1111
1’s complement: 0000
2’s complement:
1
--------
0001
---------
So, Option-C is correct answer.

Three Stage logic name itself implies there are 3 states of the buffer.
1. High (1)
2. Low (0)
3. High Impedance (Z)
→ High impedance means that a point in a circuit (a node) allows a relatively small amount of current through, per unit of applied voltage at that point.
→ High impedance circuits are low current, high voltage, whereas low impedance circuits are the opposite.
Truth table of Tri-state logic Inverter

→ ​ OR is associative:
(i) (0 OR 1)OR 1
= 1 OR 1
= 1
(ii). 0 OR (1 OR 1)
= 0 OR 1
= 1
→ NAND is not associative
(i). (0 NAND 1)NAND 1
= 1 NAND 1
= 0
(ii). 0 NAND (1 NAND 1)
= 0 NAND 0
= 1
→ ​ Ex-OR is associative
(i). (0 XOR 1) XOR 1
= 1 XOR 1
= 0
(ii). 0 XOR(1 XOR 1)
= 0 XOR 0
= 0
→ ​ AND is associative:
(i) (0 AND 1) AND 1
= 0 AND 1
= 0
(ii). 0 AND (1 AND 1)
= 0 AND 1
= 0

→ Essential hazards may occur in asynchronous sequential logic circuits working in the fundamental mode.
→ Asynchronous circuits is called essential hazard ​ is caused by unequal delays along two or more paths that originate from the same same input.
→ It​ cannot be corrected by adding redundant gates and it can only be corrected by adjusting the amount of delay in the affected path.

T-Flip flop Truth Table:

T-Flip-Flop Characteristic Table:

T-Flip-Flop Characteristic equation:
Q​ _next​ = TQ' + T'Q

Given two integer numbers are 0x5AB6 and 0x61CD
Step-1: Convert hexadecimal numbers into binary number because we want to perform AND operation.
0x5AB6 equivalent into binary number is 0101 1010 1011 0110
0x61CD equivalent into binary number is 0110 0001 1100 1101
Step-2: Perform Bitwise AND operation
0101 1010 1011 0110
0110 0001 1100 1101
-----------------------------
0100 0000 1000 0100(Bitwise AND operation)
------------------------------
Step-3: Convert result into hexadecimal number.
0100 0000 1000 0100 equivalent into hexadecimal number is 0x4084

Given values are i=4, j=3 and k=0
Step-1: k= ++i- --j + i++ - --j +j++;
k= 5 - 2 + 5 - 1 + 1
k= (5-2)+(5-1)+1
= 3 + 4 + 1
= 8
Step-2: The value of i=6,j=2 and k=8