## ISRO CS 2020

 Question 1
An array of two byte integers is stored in big endian machine in byte addresses as shown below. What will be its storage pattern in little endian machine?
0 X 104 78
0 X 103 56
0 X 102 34
0 X 101 12
 A 0 X 104 12 0 X 103 56 0 X 102 34 0 X 101 12 B 0 X 104 12 0 X 103 34 0 X 102 56 0 X 101 78 C 0 X 104 56 0 X 103 78 0 X 102 12 0 X 101 34 D 0 X 104 56 0 X 103 12 0 X 102 78 0 X 101 34
Digital-Logic-Design       Number-Systems
Question 1 Explanation:
In little endian the LSB parts of the data are stored first, whereas in big endian the MSB parts are stored first.
In the given question each integer is two bytes. 0x101, 0x102 are part of one word.
In the big endian 0x101 has 12 and 0x102 has 34. In the little endian 0x101 will have 34 and 0x102 will have 12.
Similarly in the big endian 0x103 has 56 and 0x104 has 78...in the little endian 0x103 will have 78 and 0x104 will have 56.
 Question 2
A non-pipelined CPU has 12 general purpose registers(R0, R1, R2,........R12). Following operations are supported
ADD Ra, Rb, Rr Add Ra to Rb and store the result in Rr
MUL Ra, Rb, Rr Multiply Ra to Rb and store the result in Rr
MUL operations takes two clock cycles, ADD takes one clock cycle.
Calculate the minimum number of clock cycles required to compute the value of the expression XY+XYZ+YZ. The variables X, Y, Z are initially available in registers R0, R1 and R2 contents of these registers must not be modified.
 A 5 B 6 C 7 D 8
Computer-Organization       Pipelining
Question 2 Explanation:
To calculate XY+XYZ+YZ, we need at least 3 multiplication operations and 2 ADD operations.
Assuming R0 = X, R1 = Y, R2 = Z.
MUL R3, R0, R1
MUL R4, R3, R2
MUL R6, R1, R2
Total we need 3 multiplication operations and 2 add operations.
Total cycles needed = 3*2+2 = 8
 Question 3
Minimum number of NAND gates required to implement the following binary equation
 A 4 B 5 C 3 D 6
Digital-Logic-Design       Logic-Gates
Question 3 Explanation:
AND-OR (or SOP)realization is easily convertible into NAND-NAND realization.
NOT-OR is equivalent to NAND.
Y = (A’+B’) (C+D)
Y = (A’+B’)C + (A’+B’)D
Let X= (A’+B’) , Y= C, and Z= D
One NAND gate is needed for implementing X= (A’ + B’).
Y= XY + XZ
Y= [(XY)’ (XZ)’]’
Three NAND gates are needed for [(XY)’ (XZ)’]’.
Total Four NAND gates are required to implement thY = (A’+B’) (C+D).
 Question 4

If ABCD is a 4-bit binary number, then what is code generated by the following circuit?
 A BCD code B Gray code C 8421 code D Excess-3 code
Digital-Logic-Design       Logic-Gates
Question 4 Explanation:
In a Gray code, two successive values differ in only one bit.
The given circuit takes ABCD as input and produce WXYZ as its corresponding gray code.
W = A,
X = A ⊕ B,
Y = B ⊕ C,
Z = C ⊕ D.
 Question 5
The number of tokens in the following C code segment is
switch(inputvalue)
{
case 1;b=c*d; break;
Default : b = b++ ; break;
}
 A 27 B 29 C 26 D 24
Compiler-Design       Lexical-Analyzer
Question 5 Explanation:
Switch1(2 inputvalue3 )4
{5
Case6 17 :8 b9 =10 c11 *12 d13 ;14 break15 ;16
Default17 :18 b19 =20 b21 ++22 ;23 break24 ;25
}26
 Question 6
In a two-pass assembler, resolution of subroutine calls and inclusion of labels in the symbol table is done during
 A Second pass B First pass and second pass respectively C Second pass and first pass respectively D First pass
Compiler-Design       Assembler
Question 6 Explanation:
In two pass assembler, each pass scans the program, the first pass generates the symbol table and the second pass generates the machine code.
So, inclusion of labels in symbol table is done in first pass and resolution of subroutine is done in second pass.
 Question 7

What is the in-order successor of 15 in the given binary search tree?
 A 18 B 6 C 17 D 20
Data-Structures       Binary-search-tree
Question 7 Explanation:
In Binary Tree, Inorder successor of a node is the next node in Inorder traversal of the Binary Tree. Inorder Successor is NULL for the last node in Inorder traversal.
In Binary Search Tree, Inorder Successor of an input node can also be defined as the node with the smallest key greater than the key of input node. So, it is sometimes important to find next node in sorted order.
Hence next node in sorted order for 15 is 17.
 Question 8
The minimum height of an AVL tree with n nodes is
 A Ceil (log2 (n+1)) B 1.44 log2n C Floor (log2 (n+1)) D 1.64 log2n
Data-Structures       Binary-Trees
Question 8 Explanation:
Minimum: ceil(log2(n+1))
Maximum: floor(1.44*log2(n+2)-.328)
Node: Option B is most appropriate among all.
 Question 9
The master theorem
 A Assumes the subproblems are unequal sizes B Can be used if the subproblems are of equal size C Cannot be used for divide and conquer algorithms D Cannot be used for asymptotic complexity analysis
Algorithms       Time-Complexity
Question 9 Explanation:
FALSE: The master theorem assumes the subproblems are equal sizes.
TRUE: It can be used if the subproblems are of equal size and unequal size.
FALSE: It can be used for divide and conquer algorithms
FALSE: It can be used for asymptotic complexity analysis
 Question 10
Raymond’s tree based algorithm ensures
 A No starvation, but deadlock may occur in rare clases B No deadlock but starvation may occur C Neither deadlock nor starvation can occur D Deadlock may occur in cases where the process is already starved
Question 10 Explanation:
This algorithm creates a tree data structure and hence avoids a cycle. Therefore, deadlock is not possible. A site can enter the critical section on receiving the token even when its request is not on the top of the request queue. Hence, starvation is possible.
 Question 11
Which of the following algorithms defines time quantum?
 A Shortest job scheduling algorithm B Round robin scheduling algorithm C Priority scheduling algorithm D Multilevel queue scheduling algorithm
Operating-Systems       Process-Scheduling
Question 11 Explanation:
Round Robin uses time quantum to fairly allocate CPU for each process in the system.
 Question 12
Dispatch latency is defined as
 A The speed of dispatching a process from running to the ready state B The time of dispatching a process from running to ready state and keeping the CPU idle C The time to stop one process and start running another one D None of these
Operating-Systems       Process-Scheduling
Question 12 Explanation:
The time it takes for the dispatcher to stop one process and start another is known as the dispatch latency
 Question 13
An aid to determine the deadlock occurrence is
 A Resource allocation graph B Starvation graph C Inversion graph D None of the above
Question 13 Explanation:
Resource allocation graph (RAG) is a diagrammatic representation of processes and the resources in a system. Visually one can determine the occurrence of deadlock using RAG.
 Question 14
Consider the following page reference string
1 2 3 4 2 1 5 6 2 1 2 3 7 6 3 2 1 2 3 6
What are the minimum number of frames required to get a single page fault for the above sequence assuming LRU replacement strategy?
 A 7 B 4 C 6 D 5
Operating-Systems       Page-Replacement-algorithm
Question 14 Explanation:
The minimum number of frames required are 6. If we use 4 frames or 5 frames, we get more than one-page fault using LRU page replacement algorithm.
 Question 15
Three CPU-bound tasks with execution times of 15, 12 and 5 time units respectively arrive at times , t and 8, respectively. If the operating system implements a shortest remaining time first scheduling algorithm, what should be the value of t to have 4 context switches?
Ignore the context switches at time 0 and at the end.
 A 0 < t < 3 B t = 0 C t <= 3 D 3 < t < 8
Operating-Systems       Process-Scheduling
Question 15 Explanation:
In the question it asked to find the arrival time (t) of process (P2), such that the number of context switches is exactly 4 using SRTF scheduling algorithm. It can be simply verified by taking t=1 and t=2, which causes 4 context switches. So, 0< t < 3. At, t=0 and and t >=3, no of context switches are not exactly 4.
 Question 16
Context free languages are closed under
 A Union , intersection B Union , kleene closure C Intersection, complement D Complement, kleene closure
Theory-of-Computation       Context-Free-Language
Question 16 Explanation:
CFL are closed under Union and Kleene closure but not closed under complement, intersection.
 Question 17
Which of the following is true?
 A Every subset of a regular set is regular B Every finite subset of non-regular set is regular C The union of two non regular set is not regular D Infinite union of finite set is regular
Theory-of-Computation       Regular-Language
Question 17 Explanation:
Every finite subset of any set is always regular because of finiteness.
 Question 18
The language which is generated by the grammar S aSa | bSb | a | b over the alphabet {a,b} is the set of
 A Strings that begin and end with the same symbol B All odd and even length palindromes C All odd length palindromes D All even length palindromes
Theory-of-Computation       Languages-and-Grammars
Question 18 Explanation:
The grammar generates {a, b, aaa, aba, bab, bbb, aaaaa, aabaa, …}
So the grammar generate odd length palindrome.
 Question 19
Which of the following classes of languages can validate an IPv4 address in dotted decimal format? It is to be ensured that the decimal values lie between 0 and 255.
 A RE and higher B CFG and higher C CSG and higher D Recursively enumerable language
Question 19 Explanation:
To ensure that decimal value lie between 0 and 255 we can make finite automata as number of decimal values between 0 and 255 is finite. So RE (regular) and higher is correct.
 Question 20
Minimum number of states required in DFA accepting binary strings not ending in “101” is
 A 3 B 4 C 5 D 6
Theory-of-Computation       Finite-Automata
Question 20 Explanation:
 Question 21
Which of the following is a type of out-of-order execution, with the reordering done by a compiler
 A Loop unrolling B Dead code elimination C Strength reduction D Software pipelining
Compiler-Design       Code-Optimization
Question 21 Explanation:
In computer engineering, out-of-order execution, is a technique used in most high-performance microprocessors to make use of cycles that would otherwise be wasted by a certain type of costly delay. Most modern CPU designs include support for out of order execution.
This technique is similar to loop unrolling concept in code optimization.
 Question 22
One instruction tries to write an operand before it is written by previous instruction. This may lead to a dependency called
 A True dependency B Anti dependency C Output dependency D Control hazard
Computer-Organization       Pipelining
Question 22 Explanation:
When two instructions are updating an operand and if the ordering of the instructions changes the output this is nothing but Write After Write (WAW) dependency..which is also called output dependency.
 Question 23
If every non-key attribute functionally dependent on the primary key, then the relation will be in
 A First normal form B Second normal form C Third normal form D Fourth normal form
Database-Management-System       Normalization
Question 23 Explanation:
1. Let’s take a relation R(ABC) with functional dependencies {A → B, B → C, A → C}.
2. In the question it is not mentioned that non-prime attribute is only dependent on primary key.
3. So, the functional dependency B → C, is perfectly valid.
4. This relation is in 2NF but not in 3NF because of every non-key attribute is transitively dependent on the primary key. Here “A” will be a candidate key.
 Question 24
The SQL Query
SELECT columns
FROM TableA
RIGHT OUTER JOIN TableB
ON A.columnName = B.columnName
WHERE A.columnName IS NULL
returns the following:
 A All rows in TableB, ,which meets equality condition above and, none from Table A, which meets the condition B All rows in TableA, which meets equality condition above and, none from Table B, which meets the condition C All rows in TableB, which meets equality condition D All rows in TableA, which meets equality condition E None of the above
Database-Management-System       SQL
Question 24 Explanation:
Counter example (Executed under ORACLE Express Edition)
SQL> select * from TableA;
A1 A2 A3
---------- --- ---
1 a21 a31
2 a22 a32
3 a23 a33
3 a23 a34
a24 a35
SQL> select * from TableB;
B1 B2 B3
---------- --- ---
1 b21 b31
2 b22 b31
3 b23 b32
4 a24 b33
5 b25 b34
SQL> select * from TableA RIGHT OUTER JOIN TableB
2 ON TableA.a1=TableB.b1
3 WHERE TableA.a1 IS NULL;
A1 A2 A3 B1 B2 B3
---------- --- --- ---------- --- ---
4 a24 b33
5 b25 b34
So, none of the given options are correct.
 Question 25
To send the same bit sequence, NRZ encoding require
 A Same clock frequency as Manchester encoding B Half the clock frequency as Manchester encoding C Twice the clock frequency as Manchester encoding D A clock frequency which depends on the number of zeros and ones in the bit sequence
Computer-Networks       Encoding-Decoding
Question 25 Explanation:
In Manchester encoding scheme , there is a transition after every bit. we must have clocks with double the speed to send the same amount of data as in NRZ encodings
 Question 26
The persist timer is used in TCP to
 A To detect crashes from the other end of the connection B To enable retransmission C To avoid deadlock condition D To timeout FIN_Wait1 condition
Computer-Networks       Types-of-timers
Question 26 Explanation:
TCP uses a persistent timer to deal with a zero-widow-size deadlock situation.
 Question 27
Remote Procedure calls are used for
 A Communication between two processes remotely different from each other on the same system B Communication between two processes on the same system C Communication between two processes on separate systems D None of the above E Both A and C
Computer-Networks       Telnet
Question 27 Explanation:
In distributed computing, a remote procedure call (RPC) is when a computer program causes a procedure (subroutine) to execute in a different address space (commonly on another computer on a shared network), which is coded as if it were a normal (local) procedure call, without the programmer explicitly coding the details for the remote interaction. RPC can also be implemented on the same system
 Question 28
Consider the following recursive C function that takes two arguments
unsigned int rer ( unsigned int n, unsigned int r){
If (n > 0) return ( n%r + rer (n/r,r));
else return 0;
}
What is the return value of the function rer when it is called as rer (513, 2 )?
 A 9 B 8 C 5 D 2
Programming       Functions
Question 28 Explanation:
Given input function is rer(513, 2)
Condition: n>0

Sum of bits=2 if they given 513. It represented in binary.
 Question 29
A given grammar is called ambiguous if
 A two or more production have the same non-terminal on the left hand side B A derivation tree has more than one associated sentence C there is a sentence with more than one derivation tree corresponding to it D Brackets are not present in the grammar
Compiler-Design       Ambiguous-and-Unambiguous-Grammar
Question 29 Explanation:
A grammar is ambiguous if any string generated by the grammar has more than one parse tree (derivation tree)
 Question 30
What is the output of the code given below?
#include
int main()
{
char name[ ]=”satellites”;
int len;
int size;
len = strlen (name);
size = sizeof(name);
printf(“%d”, len * size);
return 0;
}
 A 100 B 110 C 40 D 44
Programming       C-Programming
Question 30 Explanation:
strlen(name) = 10
sizeof(name)=11 // including \0 at the end which is by default for char array in C.
len*size=10 * 11 = 110
 Question 31
Regression testing is primarily related to
 A Functional testing B Development testing C Data flow testing D Maintenance testing
Software-Engineering       Software-testing
Question 31 Explanation:
→ Regression testing is re-running functional and non-functional tests to ensure that previously developed and tested software still performs after a change. If not, that would be called a regression.
→ Changes that may require regression testing include bug fixes, software enhancements, configuration changes, and even substitution of electronic components.
→ As regression test suites tend to grow with each found defect, test automation is frequently involved.
→ Regression testing is primarily related to Maintenance testing.
 Question 32
Of the following sort algorithms, which has execution time that is least dependant on initial ordering of the input?
 A Insertion sort B Quick sort C Merge sort D Selection sort
Algorithms       Sorting
Question 32 Explanation:
 Question 33
The following circuit compares two 2-bit binary numbers, X and Y represented by X1X0 and Y1Y0 respectively. ( X0 and Y0 represent Least Significant Bids)

Under what condition Z will be 1?
 A X > Y B X < Y C X = Y D X! = Y
Digital-Logic-Design       Combinational-Circuit
Question 33 Explanation:
Output of OR gate is 1 if at least one of the two inputs is1.
Case 1: X1=1 and Y1=0 which implies X > Y.
or Case 2: X1=Y1 and (X0=1 and Y0=0) which implies X > Y.
Z=1 in both of the above cases which implies X > Y.
 Question 34
What is the availability of the software with following reliability figures
Mean Time Between Failures (MTBF) is 20 days
Mean Time To Repair (MTTR) is 20 hours
 A 90% B 96% C 24% D 50%
Software-Engineering       Software-testing
Question 34 Explanation:
Mean time between failures is not the average time something works then fail.
It’s the average time between failures Mean time between failure(MTBF)s= total uptime / number of breakdowns Mean time to repair is the average time taken to repair something. Mean time to repair(MTTR)= total time down/number of breakdowns
Availability = Total uptime/(total uptime+total downtime)
= MTBF/(MTBF+MTTR)*100
= 20*24/(20*24 + 20) * 100
= 96 %
 Question 35
What is the defect rate of Six sigma?
 A 1.0 defect per million lines of code B 1.4 defect per million lines of code C 3.0 defect per million lines of code D 3.4 defect per million lines of code
Question 35 Explanation:
→ The term "six sigma" comes from statistics and is used in statistical quality control, which evaluates process capability. Originally, it referred to the ability of manufacturing processes to produce a very high proportion of output within specification.
→ Processes that operate with "six sigma quality" over the short term are assumed to produce long-term defect levels below 3.4 defects per million opportunities (DPMO). The 3.4 dpmo is based on a "shift" of ± 1.5 sigma explained by Dr. Mikel J. Harry.
→ This figure is based on the tolerance in the height of a stack of discs. Six Sigma's implicit goal is to improve all processes, but not to the 3.4 DPMO level necessarily.
→ Organizations need to determine an appropriate sigma level for each of their most important processes and strive to achieve these. As a result of this goal, it is incumbent on management of the organization to prioritize areas of improvement.
 Question 36
A stack is implemented with an array of ‘A [0...N-1]’ and a variable ‘pos’. The push and pop
operations are defined by the following code.
push(x)
A[pos] x
pos pos+1
end push
pop()
pospos+1
Return A[pos]
end pop
Which of the following will initialize an empty stack with capacity N for the above implementation?
 A pos ← -1 B pos ← 0 C pos ← 1 D pos ←N-1
Data-Structures       Queues-and-Stacks
Question 36 Explanation:
If you check push function, for every push we are decrementing pos by one.
Now if you imagine an array of length N-1, for every push the empty indices are getting decremented.
To explain in detail,
consider an empty array, so number of empty indices are N-1 ......(1)
When we push one element into it, the empty indices will reduce by 1 (i.e. decreented.)
Hence, From equation 1 we can say that pos is initialised to N-1
 Question 37
Given that
B() means “is a bear”
F() means “is a fish” and
E(a,b) means “ eats b”
Then what is the best meaning of
 A Every fish is eaten by some bear B Bears eat only fish C Every bear eats fish D Only bears eat fish
Engineering-Mathematics       Propositional-Logic
Question 37 Explanation:
Let's begin with given quantifiers. → For any Fish x, for any y is eaten by y, then y must be a bear. → Which means only bear eats fish, option D is correct → Option C says every bear eats fish, but given that every fish eaten by bear only which is not equal given. → Option B says bear eats only fish, but bear may eat anything. → Option A says every fish eaten by some bear, but it's not a single bear, it must by any bear.
 Question 38
Following declaration of an array of struct, assumes size of byte, short, int and long are 1,2, 3 and 4 respectively. Alignment rule stipulates that n-byte field must be located at an address divisible by n, the fields in a struct are not rearranged, padding is used to ensure alignment. All elements of array should be of same size.
Struct complex
Short s
Byte b
Long l
Int i
End complex
Complex C[10]
Assuming C is located at an address divisible by 8 , what is the total size of C, in bytes?
 A 150 B 160 C 200 D 240
Programming       Structure
 Question 39
In the following procedure
Integer procedure P(X,Y);
Integer X,Y;
value x;
Begin
K=5;
L=8
P=x+y;
End
X is called by value and Y is called by name. If the procedure were invoked by the following program fragment
K=0
L=0
Z=P(K,L);
then the value Z would be set equal to
 A 5 B 8 C 13 D 0
Programming       Functions
 Question 40
Consider product of three matrices M1,M2 and M3 having w rows and x columns, x rows and y columns, and y rows and z columns. Under what condition will it take less time to compute the product as (M1M2)M3 than to compute M1(M2M3)?
 A Always take the same time B ((1/x)+(1/z))<(1/ω+1/y) C x>y D (w+x)>(y+z)
Algorithms       Dynamic-Programming
Question 40 Explanation:
 Question 41
A new flip flop with inputs X and Y, has the following property

Which of the following expresses the next state in terms of X, Y, current state?
 A (X’ ∧ Q’) ∨ (Y’ ∧ Q) B (X’ ∧ Q) v (Y’ ∧ Q’) C (X ∧ Q’) v (Y ∧ Q) D (X ∧ Q’) v (Y’ ∧ Q)
Digital-Logic-Design       Sequential-Circuits
Question 41 Explanation:
 Question 42
The immediate addressing mode can be used for
2. Perform arithmetic or logical operations on data contained in instructions Which of the following is true?
 A Only 1 B Only 2 C Both 1 and 2 D Immediate mode refers to data in cache
Question 42 Explanation:
Immediate addressing mode can be used for both loading registers with initial values and for performing arithmetic or logical operations on data contained in instructions.
 Question 43
Statement associated with registers of a CPU are given. Identify the false statement
 A The program counter holds the memory address of the instruction in execution B Only opcode is transferred to the control unit C An instruction in the instruction register consists of the opcode and the operand D The value of the counter is incremented by 1 once its value has been read to the memory address register
Computer-Organization       Registers
Question 43 Explanation:
Program counter always holds the address of the next instruction, not the current instruction in execution. Hence the statement in option A is false.
 Question 44
Which of the following affects the processing power assuming they do not influence each other.
Data bus capability
Clock speed
 A 3 only B 1 and 3 only C 2 and 3 only D 1, 2 and 3
Computer-Organization       Microprocessor
Question 44 Explanation:
"Though different addressing schemes take different amount of execution times that will not affect the processing power. So, out of the given components only data bus capability and clock speed affect the processing power."
 Question 45
Convert the prefix expression to infix
-*+ABC*-DE+FG
 A (A-B)*C+(D*E)-(F+G) B (A+B)*C-(D-E)*(F-G) C (A+B-C)*(D-E)*(F+G) D (A+B)*C-(D*E)-(F+G) E None of the above
Data-Structures       Prefix-Postfix-Expression
Question 45 Explanation:
Prefix: -*+ABC*-DE+FG
Read the Prefix expression in reverse order (from right to left)
GF+ED-*CBA+*-
If the symbol is an operand, then push it onto the Stack
If the symbol is an operator, then pop two operands from the Stack
Create a string by concatenating the two operands and the operator between them.
string = (operand1 + operator + operand2)
And push the resultant string back to Stack

=>
C*(A+B)-(D-E)*(F+G)
which is equivalent to =>
(A+B)*C-(D-E)*(F+G)
 Question 46
Consider a 5-segment pipeline with a clock cycle time 20ns in each sub operation. Find out the approximate speed-up ratio between pipelined and non-pipelined system to execute 100 instructions. (if an average, every five cycles, a bubble due to data hazard has to be introduced in the pipeline)
 A 5 B 4.03 C 4.81 D 4.17
Computer-Organization       Pipelining
Question 46 Explanation:
A 5 segment pipeline with clock cycle time of 20ns.
Time without pipeline for one instruction = 5*20 = 100ns.
For 100 instructions time without pipeline = 100*100ns = 10^4 ns.
With pipeline, it is given that on average for every 5 cycles there is one bubble or stall cycle which is introduced. So stall frequency = ⅕.
In general in a pipeline we have clocks per instruction CPI = 1. But when there are stall cycles, the updated CPI = (1 + stall frequency * no. of stall cycles) = (1+⅕*1) = 1.2
Execution time with the pipeline = no. of instructions * CPI * clock cycle time.
= 100 * 1.2 * 20 = 2400ns
Speed up = Time without pipeline / Time with pipeline
= 10^4 / 2400 = 100/24 = 4.17
 Question 47
Consider a 32-bit processor which supports 70 instructions. Each instruction is 32 bit long and has 4 fields namely opcode, two register identifiers and an immediate operand of unsigned integer type. Maximum value of the immediate operand that can be supported by the processor is 8191. How many registers the processor has?
 A 32 B 64 C 128 D 16
Computer-Organization       Microprogrammed-Control-Unit
Question 47 Explanation:
Given that each instruction is 32 bit long and it has 4 fields.
As there are 70 instructions, each opcode needs 7 bits as ceil(log70) = 7.
It is given that maximum value of the immediate operand is 8191.
Number of bits needed for the immediate operand = ceil(log8191) = 13.
Out of the total 32 bits, remaining bits for the two register identifiers = 32 - 7 - 13 = 32 - 20 = 12
These 12 bits are equally divided to identify the two registers. So to identify each register we need 6 bits. So there are a total of 2^6 = 64 registers.
 Question 48
In a 8-bit ripple carry adder using identical full adders, each full adder takes 34ns for computing sum. If the time taken for 8-bit addition is 90ns, find the time taken by each full adDer to find carry.
 A 6 ns B 7 ns C 10 ns D 8 ns
Digital-Logic-Design       Combinational-Circuit
Question 48 Explanation:
Total Delay = Delay_Sum + (n-1) Delay_Carry
Here, n=8.
90ns = 34 ns + 7 * Delay_Carry
56ns = 7 * Delay_Carry
Delay_Carry= 8ns
 Question 49
Following Multiplexer circuits is equivalent to
 A Sum equation of full adder B Carry equation of full adder C Borrow equation for full subtraction D Difference equation of a full subtractor E Both A and D
Digital-Logic-Design       Combinational-Circuit
Question 49 Explanation:
The output Y of the given MUX is the equation for the difference of a full subtractor and Sum of a Full Adder.
Y is the difference between A and B where C is the Barrow.
Y is the Sum of A and B where C is the Carry_in.

Y = B’A’C + B’AC’ + BA’C’ + BAC
Y = (A ⊕ B ⊕ C)
 Question 50
A stack organised computer is characterised by instructions with
Question 50 Explanation:
A stack organized computer is characterized by zero address instructions which will perform operations on the top elements of the stack.
For example ADD will do addition of top two elements of the stack and puts the result as the top most element.
 Question 51
A computer which issues instructions in order, has only 2 registers and 3 opcodes ADD, SUB and MOV. Consider 2 different implementations of the following basic block:
Case 1 Case 2
t1=a+b; t2=c+d;
t2=c+d; t3=e-t2;
t3=e-t2; t1=a+b;
t4=t1-t2; t4=t1-t2;
Assume that all operands are initially in memory . Final value of computation also has to reside in memory. Which one is better in terms of memory accesses and by how many MOV instructions?
 A Case 2,2 B Case 2,3 C Case 1,2 D Case 1,3 E None of the above
Computer-Organization       Machine-Instructions
Question 51 Explanation:
Case-1 is better by Case-2 by One more operation. None of the answers are correct
 Question 52
Which one indicate a technique of building cross compilers?
 A Beta cross B Canadian cross C Mexican cross D X-cross
Compiler-Design       Compilers
Question 52 Explanation:
Canadian cross is a famous technique of building cross compilers.
 Question 53
Consider a 2-dimensional array x with 10 rows and 4 columns, with each element storing a value equivalent to the product of row number and column number. The array is stored in row-major format. If the first element x[0][0] occupies the memory location with address 1000 and each element occupies only one memory location, which all locations (in decimal) will be holding a value of 10?
 A 1018, 1019 B 1022, 1041 C 1013, 1014 D 1000, 1399 E None of the above
Programming       Arrays
 Question 54
The post order traversal of a binary tree is ACEDBHIGF. The preorder traversal is
 A ABCDEFGHI B FBADCEGIH C FABCDEGHI D ABDCEFGIH E None of the above
Data-Structures       Binary-Trees
 Question 55
In linear hashing, if blocking factor bfr, loading factor l and file buckets N are known, the number of records will be
 A cr=l+bfr + N B r= l-bfr - N C r=l+bfr - N D r=l*bfr*N
Data-Structures       Hashing
Question 55 Explanation:
In linear hashing, if blocking factor bfr, loading factor l and file buckets N are known, the number of records will be r=l*bfr*N.
 Question 56
What is compaction refers to
 A A technique for overcoming internal fragmentation B A paging technique C A technique for overcoming external fragmentation D A technique for compressing the data
Operating-Systems       Memory-Management
Question 56 Explanation:
Compaction is used to reduce the external fragmentation.
 Question 57
The operating system and the other processes are protected from being modified by an already running process because
 A They run at different time instants and not in parallel B They are in different logical addresses C They use a protection algorithm in the scheduler D Every address generated by the CPU is being checked against the relocation and limit parameters
Operating-Systems       Memory-Management
Question 57 Explanation:
Relocation registers used to protect user processes from each other, and from changing operating-system code and data. Base register contains value of the smallest physical address. Limit register contains range of logical addresses and each logical address must be less than the limit register.
 Question 58
G is an undirected graph with vertex set { v1, v2, v3, v4, v5, v6, v7} and edge set {v1v2, v1v3, v1v4, v2v4, v2v5, v4v4, v4v5, v4v6, v5v6, v6v7}. A breadth first search of the graph is performed with v1 as the root node. Which of the following is a tree edge?
 A v2v4 B v1v4 C v4v5 D v3v4
Data-Structures       Graphs-and-Tree
 Question 59
If the array A contains the items 10, 4, 7, 23, 67, 12 and 5 in that order, what will be the resultant array A after third pass of insertion sort?
 A 67, 12, 10, 5, 4, 7, 23 B 4, 7, 10, 23, 67, 12, 5 C 4, 5, 7, 67, 10, 12, 23 D 10, 7, 4, 67, 23, 12, 5
Algorithms       Sorting
Question 59 Explanation:
Initial positions: 10, 4, 7, 23, 67, 12 , 5
Pass-1: 4, 10, 7, 23, 67, 12, 5
Pass-2: 4, 7, 10, 23, 67, 12, 5
Pass-3: 4, 7, 10, 23, 67, 12, 5 [ No change because the value 10 is placed in the same position ]
 Question 60
Huffman tree is constructed for the following data: { A, B, C, D, E} with frequency {0.17, 0.11, 0.24, 0.33 and 0.15} respectively. 100 00 01 101 is decoded as
Algorithms       Greedy-approach
Question 60 Explanation:

 Question 61
Given the grammar
s→ T*S | T
T → U + T | U
U → a | b
Which of the following statements is wrong?
 A Grammar is not ambiguous B Priority of + over * is ensured C Right to left evaluation of * and + happens D None of these
Compiler-Design       Parsers
Question 61 Explanation:
The grammar is unambiguous as it can be parsed by CLR(1) parser.
S-> T*S , since S has right recursion so * is right associative
T-> U+T , since T has right recursion so + is right associative
Hence right to left evaluation of * and + will happen.
+ is having more precedence than * so the precedence of + and * is clearly defined.
 Question 62
Which is the complexity of the following code?
sum=0;
for(i=1; i<=n; i*=2)
for(j=1; j<=n; j++)
sum++;
Which of the following is not a valid string?
 A O(n2) B O(nlogn) C O(n) D O(nlogn logn)
Algorithms       Time-Complexity
Question 62 Explanation:
sum=0; → O(1) Time
for(i=1; i<=n; i*=2) → O(logn) time
for(j=1; j<=n; j++) → O(n) Time
sum++; → O(1) time
Total time complexity: O(nlogn) but in question they given not a valid string.
So, O(n2) > O(nlogn logn) > O(nlogn) > O(n).
This program can’t run less than O(nlogn) time.
 Question 63
Which of the following is an efficient method of cache updating?
 A Snoopy writes B Write through C Write within D Buffered write
Computer-Organization       Cache
 Question 64
In a columnar transposition cipher, the plain text is “the tomato is a plant in the night shade family”, keyword is “TOMATO”. The ciphertext is
 A “TINESAX / EOAHTFX / HTLTHEY / MAIIAIX / TAPNGDL / OSTNHMX” B “TINESAX / EOAHTFX / MAIIAIX / HTLTHEY / TAPNGDL / OS TN HMX” C “TINESAX / EOAHTFX / HTLTHEY / MAIIAIX / OSTNHMX / TAPNGDL” D “EOAHTFX / TINESAX / HTLTHEY / MIIAIX / TAPNGDL / OSTNHMX”
Computer-Networks       Network-Security
Question 64 Explanation:
We first pick a keyword for our encryption. We write the plaintext out in a grid where the number of columns is the number of letters in the keyword. We then title each column with the respective letter from the keyword. We take the letters in the keyword in alphabetical order, and read down the columns in this order. If a letter is repeated, we do the one that appears first, then the next and so on.
encrypt the message "The tomato is a plant in the nightshade family" using the keyword tomato. We get the grid given below.
We have written the keyword above the grid of the plaintext, and also the numbers telling us which order to read the columns in. Notice that the first "O" is 3 and the second "O" is 4, and the same thing for the two "T"s.

The plaintext is written in a grid beneath the keyword. The numbers represent the alphabetical order of the keyword, and so the order in which the columns will be read.
Starting with the column headed by "A", our ciphertext begins "TINESAX" from this column. We now move to the column headed by "M", and so on through the letters of the keyword in alphabetical order to get the ciphertext "TINESAX / EOAHTFX / HTLTHEY / MAIIAIX / TAPNGDL / OSTNHMX" (where the / tells you where a new column starts). The final ciphertext is thus "TINESAX EOAHTFX HTLTHEY MAIIAIX TAPNGDL OSTNHMX".
 Question 65
Avalanche effect in cryptography refers
 A Large changes in cipher text when the keyword is changed minimally B Large changes in cipher text when the plain text is changed C Large impact of keyword change to the length of the cipher text D None of the above
Computer-Networks       Network-Security
Question 65 Explanation:
Avalanche effect describes a concept in cryptography, where a small change in the input value (keyword) causes a significant change in the output (hash value/ cipher text)
 Question 66
A magnetic disk has 100 cylinders, each with 10 tracks of 10 sector. If each sector contains 128 bytes, what is the maximum capacity of the disk in kilobytes?
 A 1,280,000 B 1280 C 1250 D 128,000
Computer-Organization       Secondary-Memory
Question 66 Explanation:
There are 100 cylinders, each with 10 tracks, and 10 sectors. Each sector is 128 bytes.
Maximum capacity of the disk = 100*10*10*128 bytes
= 10^4 * 128 bytes
= (128*10^4 / 1024) KB
= (10^4/ 8) = 1250 KB
 Question 67
How many total bits are required for a direct-mapped cache with 128 KB of data and 1 word block size, assuming a 32-bit address and 1 word size of 4 bytes?
 A 2 Mbits B 1.7 Mbits C 2.5 Mbits D 1.5 Mbits
Computer-Organization       Cache
Question 67 Explanation:
Size of a cache line = block size = 4 bytes
Number of lines in the cache = cache size / line size = 128KB / 4 bytes = 32K = 2^15
In a direct mapped cache the address is split into 3 fields (TAG, LINE, OFFSET)
Here OFFSET is the number bits needed to identify a word within the cache line.
As line size = word size, we don’t need any bits to identify the word within a block so OFFSET = 0.
As there are 2^15 lines in the cache, LINE needs 15 bits. From the 32 bits of physical address, TAG bits = 32 - 15 = 17 bits. TAG directory size = Number of cache lines * TAG bits = 2^15 * 17 = 544 K bits Cache data size = 128KB = 128 * 8 K bits = 1024 K bits Total cache size = TAG directory size + cache data size = 544 K + 1024 K = 1564 K bits = 1.53 M bits
 Question 68
Properties of ‘DELETE’ and ‘TRUNCATE’ commands indicate that
 A After the execution of ‘TRUNCATE’ operation, COMMIT, and ROLLBACK statements cannot be performed to retrieve the lost data, while ‘DELETE’ allow it B After the execution of ‘DELETE’ and ‘TRUNCATE operation retrieval is easily possible for the lost data C After the execution of ‘DELETE’ operation, COMMIT and ROLLBACK statements can be performed to retrieve the lost data, while TRUNCATE do not allow it D After the execution of ‘DELETE’ and ‘TRUNCATE’ operation no retrieval is possible for the lost data
Database-Management-System       SQL
Question 68 Explanation:
TRUNCATE is a DDL command, it does not require a commit to make the changes permanent. Because of this reason the rows deleted by truncate could not be rollbacked. On the other hand, DELETE is a DML command, hence requires explicit commit to make its effect permanent.After performing a DELETE, you need to COMMIT or ROLLBACK the transaction to make the change permanent or to undo it.
 Question 69
Checksum field in the TCP header is
 A Ones complement of sum of header and data in bytes B Ones complement of sum of header, data and pseudo header in 16 bit words C Dropped from IPv6 header format D Better than md5 or sh1 methods
Computer-Networks       TCP/UDP
Question 69 Explanation:
one’s complement sum of all 16 bit words in the header.
The checksum is not only calculated using TCP/UDP headers and data. It also adds several bits of data from IP header as well. This data is sometimes called as a pseudo header.
 Question 70
If x+2y=30, then
((2y/5) + (x/3)) + ((x/5) + (2y/3))
Will be equal to
 A 8 B 16 C 18 D 20
Engineering-Mathematics       Combinatorics
Question 70 Explanation:
 Question 71
For the distributions given below:

Which of the following is correct for the above distributions?
 A Standard deviation of A is significantly lower than standard deviation of B B Standard deviation of A is slightly lower than standard deviation of B C Standard deviation of A is the same as standard deviation of B D Standard deviation of A is significantly higher than standard deviation of B
Engineering-Mathematics       Probability
Question 71 Explanation:
The standard deviation (SD) is a measure of the amount of variation or dispersion of a set of values.
 Question 72
The hardware implementation which provides mutual exclusion is
 A Semaphore B Test and set instruction C Both Options D None of the options
Operating-Systems       Process-Synchronization
Question 72 Explanation:
Mutual exclusion is a property of concurrency control, which is instituted for the purpose of preventing race conditions. It is the requirement that one thread of execution never enters its critical section at the same time that another concurrent thread of execution enters its own critical section, which refers to an interval of time during which a thread of execution accesses a shared resource, such as shared memory.
 Question 73
What is the output of the following ‘c’ code assuming it runs on a byte addresses little endian machine?
#include
int main()
{
int x; char *ptr;
x=622,100,101;
printf(“%d”,(*(char*)&x)*(x%3));
return 0;
}
 A 622 B 311 C 22 D 110
Programming       C-Programming
Question 73 Explanation:
X will store the value 622.
Character pointer will point to only first of that number which is 110.
622%3 =1
So finally 110*1=110
 Question 74
What is the output in a 32 bit machine with 32 bit compiler?
#include
rer(int **ptr2, int **ptr1)
{
int* ii;
ii=*ptr2;
*ptr2=*ptr1;
*ptr1=ii;
**ptr1*=**ptr2;
**ptr2+=**ptr1;
}
void main()
{
int var1=5, var2=10;
int *ptr1=&var1, *ptr2=&var2;
rer(&ptr1, &ptr2);
printf(“%d %d”, var2, var1);
}
 A 60 70 B 50 50 C 50 60 D 60 50
Programming       C-Programming
Question 74 Explanation:
Address of var1 and var2 passed to the function.
rer(int **ptr2, int **ptr1) // ptr2 will point to var1 and ptr1 will point to var2
{
int* ii;
ii=*ptr2; // value 5 will store memory location which is pointed by pointer “ii”
*ptr2=*ptr1; // value 10 will store memory location which is pointed by pointer “ptr2”
*ptr1=ii; // pointer will point to “ii” which means that ptr1 will point to 5
**ptr1*=**ptr2; //**ptr1 =**ptr1* **ptr2 =5*10 =50
**ptr2+=**ptr1; // **ptr2=**ptr2+ **ptr1 =10+50 =60
}
Var1 value modified into 50 and var2 value modified into 60
 Question 75
Consider the following pseudo code
I=0; J=0; K=8;
while(I {
J=J+1;
while(J {
if(J {
temp=x[I])
x[I] = x[J];
x[J]=temp;
}
} // end of while-2
I=I+1;
} // end of while-1
The cyclomatic complexity of the above is
 A 3 B 2 C 4 D 1
Programming       Control-Statement
Question 75 Explanation:
Cyclomatic complexity is a software metric used to indicate the complexity of a program. It is a quantitative measure of the number of linearly independent paths through a program's source code.
The complexity M is then defined as
M = E − N + 2P,
where
E = the number of edges of the graph.
N = the number of nodes of the graph.
P = the number of connected components.
 Question 76
In a class definition with 10 methods, to make the class maximally cohesive, number of direct and indirect connections required among the methods are
 A 90, 0 B 45, 0 C 10, 10 D 45, 45
Software-Engineering       Coupling-and-Cohesion
Question 76 Explanation:
Methods a and b are related if:
They both access the same class-level variable, or
The call trees starting at a and b access the same class-level variable.
When 2 methods are related this way, we call them directly connected.
When 2 methods are not directly connected, but they are connected via other methods, we call them indirectly connected. Example: A - B - C are direct connections. A is indirectly connected to C (via B).
TCC tells the "connection density", so to speak (while LCC is only affected by whether the methods are connected at all). TCC=LCC=1 is the maximally cohesive class where all methods are directly connected to each other.
Consider a class with N public methods. Let NP be the maximum number of public method pairs : NP = [N * (N – 1)] / 2.
= [10*(9)] / 2
= 90/2
= 45
For Directed Connections:
Let NDC be the number of direct connections between public methods. Then TCC is defined as the relative number of directly connected public methods.
Then, TCC = NDC / NP
NDC =TCC*NP
=45*1
=45
For indirect connections:
Loose Class Cohesion. Let NID be the number of indirect connections between public methods. Then LCC is defined as the relative number of directly or indirectly connected public methods. LCC = NID +NDC/ NP.
1=NID+45/45⇒ NID=0.
 Question 77
Of the following, which best approximately the ratio of the number of nonterminal nodes in the total number of nodes in a complete K-ary tree of depth N?
 A 1/N B N-1/N C 1/K D K-1/K
Data-Structures       Trees
Question 77 Explanation:

Ratio of internal nodes to the total nodes = n/(nk + 1)
= 1/k
 Question 78
A grammar is defined as
A→ BC
B→ x | Bx
C→ B | D
D→ y | Ey
E→ z
The non-terminal alphabet of the grammar is
 A {A,B,C,D,E} B {B,C,D,E} C {A,B,C,D,E,x,y,z} D {x,y,z}
Theory-of-Computation       Languages-and-Grammars
Question 78 Explanation:
Since A,B,C,D,E all derive something in grammar so {A,B,C,D,E} all are non terminals, also by default we represent non terminal with capital letters.
 Question 79
If A={x,y,z} and B={u,v,w,x} and the universe is {s,t,u,v,w,x,y,z}
Then {A U B’) ∩ (A ∩ B) is equal to
 A {u,v,w,x} B { } C {u,v,w,x,y,z} D {u,v,w} E None of the above
Engineering-Mathematics       Set-Theory
Question 79 Explanation:
A ∩ B ={x}
The complement of a set, denoted A', is the set of all elements in the given universal set U that are not in A.
So Here B’={s,t,y,z}
AUB’={x,y,z}U{s,t,y,z} ={x,y,z,s,t,y,z}
{A U B’) ∩ (A ∩ B) ={x}∩{x,y,z,s,t,y,z} ={x}
Method-2:
 Question 80
Consider the following circuit

The function by the network above is
 A (AB)’E + EF + (CD)’F B (E’ + ABF’)(C+D+F’) C ((AB)’+E)(E’+F’)(C+D+F’) D (A+B)E’ + (EF)’ + CDF’
Digital-Logic-Design       Combinational-Circuit
Question 80 Explanation:
[ ((AB)’ E) + (EF) + (F(C+D)’) ]’
= ((AB)’ E)’ (EF)’ (F(C+D)’)’
= (AB+E’)(E’+F’)(F’+C+D)
= (ABE’ + ABF’ + E’ + E’F’)(F’+C+D)
= (ABF’+ E’(AB+1+F’))(F’+C+D)
= (ABF’+E’) (F’+C+D)
There are 80 questions to complete.