NTA UGC NET DEC-2022 Paper-2
Question 1 |
The negation of "Some students like hockey" is:
Some students dislike hockey | |
Every student dislike hockey | |
Every student like hockey | |
All students like hockey |
Question 1 Explanation:
Negation of like is dislike and negation of some one is all(every one)
So negation of some one likes hockey is every student dislikes hockey
So negation of some one likes hockey is every student dislikes hockey
Question 2 |
A relation 'R' is defined on ordered pairs of integers as:
(x,y)R(u,v) if x < u and y > v. Then R is
(x,y)R(u,v) if x < u and y > v. Then R is
Neither a partial order nor an equivalence relation | |
A partial order but not a total order | |
A total order | |
An equivalence relation |
Question 2 Explanation:
A binary relation is an equivalence relation on a nonempty set S if and only if the relation is reflexive(R), symmetric(S) and transitive(T).
A binary relation is a partial order if and only if the relation is reflexive(R), antisymmetric(A) and transitive(T).
From the given relation, it is neither partial order nor equivalence relation.
A binary relation is a partial order if and only if the relation is reflexive(R), antisymmetric(A) and transitive(T).
From the given relation, it is neither partial order nor equivalence relation.
Question 3 |
Suppose you are married and not you and your partner attend a party with three other married couples. Several handshakes took place. No one shook hands with himself (or herself0 or with their partner, and no one shook hands with the same person more than once. After all hand shaking was completed, suppose you asked each person, including your partner, how many hands they had shaken. Each person gave a different answer. How many hands did your spouse shake?
1 | |
2 | |
3 | |
4 |
Question 4 |
Consider the following conditional code, which returns a Boolean values
if ((x>25) && (y>100))
return 'false';
else if((x<=25) && (y<=100)
return 'true';
else if((x>25) && (y<=100)
return 'false';
else
return 'true';
simplify it by filling in the following blank with a single Boolean expression without changing the behaviour of the conditional code.
if( ...........)
return 'true';
else
return 'false';
if ((x>25) && (y>100))
return 'false';
else if((x<=25) && (y<=100)
return 'true';
else if((x>25) && (y<=100)
return 'false';
else
return 'true';
simplify it by filling in the following blank with a single Boolean expression without changing the behaviour of the conditional code.
if( ...........)
return 'true';
else
return 'false';
x>25 | |
x<=25 | |
y>100 | |
y<=100 |
Question 4 Explanation:
According to given conditions, if x value is < = 25 means it will return true and for other values it will return false.
Alone y<=100 won't return true, it should be along with x<=25
Alone y<=100 won't return true, it should be along with x<=25
Question 5 |
Which one of the following types of memory is fastest?
Cache Memory | |
Register Memory | |
Main Memory | |
Secondary Memory |
Question 5 Explanation:
Registers are closest to the processor. Accumulator, Data Register, Programme Counter, General Purpose, and other register types are only a few examples.
Registers are smaller and faster than cache memory. If we count both the memory units on the memory hierarchy, then registers are on the top of the memory hierarchy.
Registers are smaller and faster than cache memory. If we count both the memory units on the memory hierarchy, then registers are on the top of the memory hierarchy.
Question 6 |
The memory size for n address lines and m data lines is given by
2m X n | |
m X n2 | |
2n X m | |
n X m2 |
Question 6 Explanation:
Memory size of n-address lines and m data line is 2^n X m
Question 7 |
Simplify the following using K-Map
F(A,B,C,D)= Σ(0,2,5,7,8,10,13,15)
F(A,B,C,D)= Σ(0,2,5,7,8,10,13,15)
BD + B'D' | |
AC + A'C' | |
BC + B'C' | |
AD + A'D' |
Question 7 Explanation:


Question 8 |
Consider an unpipelined machine with 10nsec clock cycles which uses four cycles for ALU operations and branches whereas five cycles for memory operation. Assume that the relative frequencies of those operations are: 40% , 20% and 40%, respectively. Due to clock skew and setup pipeline let us consider that the machine adds one nsec overhead to the clock. How much speedup is observed in the instruction execution rate when a pipelined machine is considered.
2 times | |
4 times | |
6 times | |
8 times |
There are 8 questions to complete.