August 11, 2023
Question 64 An 8-way set associative cache of size 64 KB (1 KB = 1024 bytes) is used in a system with 32-bit address. The address […]
August 17, 2023
Question 2 A non-pipelined CPU has 12 general purpose registers(R0, R1, R2,……..R12). Following operations are supported ADD Ra, Rb, Rr Add Ra to Rb and store […]
September 26, 2023
Question 1 Consider a 33 MHz CPU based system. What is the number of wait states required if it is interfaced with a 60 ns memory? […]
October 3, 2023
Question 10 The number of address lines in a memory chip of size 8 192 × 8 is A 8 B 12 C 13 D 16 […]