April 7, 2025
Question 13 Which of the following is not a form of memory? A instruction cache B instruction register C instruction opcode D translation look-a-side buffer Computer-OrganizationInstruction-Execution […]
April 7, 2025
Question 11 In serial data transmission, every byte of data is padded with a ‘0’ in the beginning and one or two ‘1’s at the end […]
April 7, 2025
Question 46 Arrange the following configuration for CPU in decreasing order of operating speeds: Hard wired control, vertical microprogramming, horizontal microprogramming. A Hard wired control, vertical […]
April 7, 2025
Question 49 The main differences(s) between a CISC and A RISC processor is/are that a RISC processor typically A has fewer instructions B has fewer addressing modes C […]
April 9, 2025
Question 1 Which are often needed to evaluate the cache performance? A Hit Ratio B Latency C Cache Traces D Transfer Rate computer-organizationCache Correct Answer: A
April 11, 2025
Question 9 The details of an interrupt cycle are shown in figure. Given that an interrupt input arrives every 1 msec, what is the percentage of […]
April 11, 2025
Question 5 A CPU has a 5-stage pipeline with the following stages Fetch (F), Decode (D), Execute (E), Memory (M) and Write-back (W). Each stage takes […]
April 11, 2025
Question 22 A multi processor system with 16 processors is used to execute a parallelizable task. If the serial portion of the task takes 200 clock […]
April 11, 2025
Question 88 Consider the following statement regarding special-purpose registers. (A) Program Counter (PC) keeps the track of the next instruction executed. (B) Instruction register holds the […]
April 15, 2025
Question 30 Match list I and List II Choose the correct answer from the options given below: A A-I, B-II, C-III, D-IV B A-II, B-IV, C-III, […]