April 7, 2025

GATE 2002

Question 13 Which of the following is not a form of memory? A instruction cache B instruction register C instruction opcode D translation look-a-side buffer Computer-OrganizationInstruction-Execution […]
April 7, 2025

GATE 2002

Question 11 In serial data transmission, every byte of data is padded with a ‘0’ in the beginning and one or two ‘1’s at the end […]
April 7, 2025

GATE 1999

Question 46 Arrange the following configuration for CPU in decreasing order of operating speeds: Hard wired control, vertical microprogramming, horizontal microprogramming. A Hard wired control, vertical […]
April 7, 2025

GATE 1999

Question 49 The main differences(s) between a CISC and A RISC processor is/are that a RISC processor typically A has fewer instructions B has fewer addressing modes C […]